scholarly journals A high-reliability and low-power computing-in-memory implementation within STT-MRAM

2018 ◽  
Vol 81 ◽  
pp. 69-75 ◽  
Author(s):  
Liuyang Zhang ◽  
Erya Deng ◽  
Hao Cai ◽  
You Wang ◽  
Lionel Torres ◽  
...  
2018 ◽  
Vol 67 (5) ◽  
pp. 631-645 ◽  
Author(s):  
Yu Bai ◽  
Ronald F. DeMara ◽  
Jia Di ◽  
Mingjie Lin

2007 ◽  
Vol 28 (7) ◽  
pp. 622-624 ◽  
Author(s):  
Yan Li ◽  
Ru Huang ◽  
Yimao Cai ◽  
Falong Zhou ◽  
Xiaonan Shan ◽  
...  

2020 ◽  
Vol 1004 ◽  
pp. 776-782
Author(s):  
Kosuke Uchida ◽  
Toru Hiyoshi ◽  
Yu Saito ◽  
Hiroshi Egusa ◽  
Tatsushi Kaneda ◽  
...  

1200 V / 200 A V-groove trench MOSFET optimized to achieve low power loss, high oxide reliability under a drain bias condition and high avalanche ruggedness is shown in this paper. We revealed a relationship between the lifetime under a high temperature reverse bias condition and the oxide electric field. In accordance with the results of the test, the 1200 V / 200 A trench MOSFET showed an improvement in the tradeoff between the on-resistance and oxide electric field with the presence of current spreading layers. In order to obtain low on-resistance and high avalanche ruggedness at the same time, buried guard ring structures, which made the blocking voltage of the edge termination area higher than that of the active area, was developed. The fabricated MOSFETs demonstrated a low specific on-resistance of 3.1 mΩ cm2. A predicted lifetime of 200 years under a high temperature drain bias condition of 1200 V was achieved by the optimized design. A short circuit withstand time of 6 μs and a high avalanche energy of 7.8 J/cm2 were shown.


2020 ◽  
Vol 67 (11) ◽  
pp. 4075-4084
Author(s):  
Ze-Kun Zhou ◽  
Anqi Wang ◽  
Yunkun Wang ◽  
Jiani Wang ◽  
Yue Shi ◽  
...  

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