Electron microscopy of defects in silicon-on-insulator structures formed by selective epitaxial growth

1993 ◽  
Vol 51 ◽  
pp. 798-799
Author(s):  
Z. S. H. Weng-Sieh ◽  
J. C. Lou ◽  
W. G. Oldham ◽  
R. Gronsky
Keyword(s):  
Epitaxial Growth ◽  
Integrated Circuit ◽  
Silicon Substrate ◽  
New Technology ◽  
Three Dimensional ◽  
Chemical Vapor ◽  
Nucleation And Growth ◽  
Silicon On Insulator ◽  
Epitaxial Silicon ◽  
Selective Epitaxial Growth

In the interest of obtaining increased integrated circuit device density, a relatively new technology known as selective epitaxial growth (SEG) of silicon is being explored, especially for improved isolation of devices including possible three dimensional (vertical) integration. This technology involves the deposition and selective nucleation and growth of silicon from the vapor phase, seeded by the silicon substrate. The process is “selective” because nucleation and growth occurs on the silicon substrate but is prohibited on the oxide. The epitaxial silicon proceeds to grow upward and laterally over the oxide.Silicon deposition was performed in a horizontal hot-walled low pressure chemical vapor deposition (LPCVD) reactor. A dry thermal oxide was grown on the substrates, patterned, and etched to create seed windows. A 900 °C prebake was performed at a pressure of 6 torr in a hydrogen ambient for a period of 15 minutes, with in some cases, a small concentration (approximately 0.025%) of dichlorosilane (DCS) gas, and deposition was performed at 850 °C through the decomposition of DCS gas: SiH2Cl2 -> Si(s)+ 2HCl(g).

Improvements in Zone Melt Recrystallized Soi Layers by the Use of Selective Epitaxial Growth in the Seed Windows.

1987 ◽  
Vol 107 ◽  
Author(s):  
D.A. Williams ◽  
R.A. McMahon ◽  
H. Ahmed ◽  
L. Karapiperis ◽  
G. Garry ◽  
...  
Keyword(s):  
Epitaxial Growth ◽  
Three Dimensional ◽  
Silicon Layer ◽  
Silicon On Insulator ◽  
Cross Sectional ◽  
Selective Epitaxial Growth ◽  
Beam System ◽  
Transmission Electron ◽  
The One ◽  
Zone Melt

AbstractThe effect of selective epitaxial growth (SEG) of silicon in the seed windows of silicon on insulator structures prior to recrystallization has been investigated. Subsequent zone melt recrystallization of these structures was performed in a dual electron beam system, and it was found that the full planarisation of the deposited silicon layer results in uniform film thickness after recrystallization. Cross sectional scanning and transmission electron microscopy, optical microscopy after defect etching, and bevelling are used to analyse the material. The SEG method improves the uniformity of the film for device island etching, and so is useful for all silicon on insulator applications, although the one of most interest for these investigations is the production of three dimensional circuitry. This is achieved by stacking layers of devices, and so planarity is particularly important.

Selective epitaxial growth of Ge 1−x Sn x on Si by using metal-organic chemical vapor deposition

2017 ◽  
Vol 468 ◽  
pp. 614-619 ◽  
Author(s):  
Tomoya Washizu ◽  
Shinichi Ike ◽  
Yuki Inuzuka ◽  
Wakana Takeuchi ◽  
Osamu Nakatsuka ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Epitaxial Growth ◽  
Vapor Deposition ◽  
Chemical Vapor ◽  
Organic Chemical ◽  
Selective Epitaxial Growth ◽  
Metal Organic ◽  
Organic Chemical Vapor Deposition

Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth

1999 ◽  
Vol 20 (5) ◽  
pp. 194-196 ◽  
Author(s):  
Sangwoo Pae ◽  
Taichi Su ◽  
J.P. Denton ◽  
G.W. Neudeck
Keyword(s):  
Epitaxial Growth ◽  
Silicon On Insulator ◽  
Selective Epitaxial Growth

Tem Characterization of Highly Oriented Diamond Films on (001) Silicon Synthesized by Bias Enhanced Nucleation Technique

1996 ◽  
Vol 458 ◽  
Author(s):  
Seung-Joon Jeon ◽  
Arun Kumar Chawla ◽  
Young-Joon Baik ◽  
Changmo Sung
Keyword(s):  
Surface Morphology ◽  
Growth Mechanism ◽  
Silicon Substrate ◽  
Three Dimensional ◽  
Diamond Films ◽  
Nucleation And Growth ◽  
Texture Formation ◽  
Tem Characterization ◽  
Nucleation And Growth Mechanism

ABSTRACTHighly oriented diamond films were deposited on a (001) silicon substrate by bias enhanced MPCVD technique. Three-dimensional TEM characterizations were carried out to understand the nucleation and growth mechanism of diamond grains. The surface morphology, defects, and misorientations of diamond films were compared as a function of synthesizing temperatures and thickness of the films. From our experimental results the texture formation mechanism of diamond films is discussed.

Evaluation of Thin Dielectric-Glue Wafer-Bonding for Three Dimensional Integrated Circuit-Applications

2004 ◽  
Vol 812 ◽  
Author(s):  
Y. Kwon ◽  
J. Yu ◽  
J.J. McMahon ◽  
J.-Q. Lu ◽  
T.S. Cale ◽  
...  
Keyword(s):  
Residual Stress ◽  
Thermal Cycling ◽  
Wafer Bonding ◽  
Integrated Circuit ◽  
Thermal Cycle ◽  
Three Dimensional ◽  
Chemical Vapor ◽  
Adhesion Energy ◽  
Chemical Vapor Deposited ◽  
Three Dimensional Integrated Circuit

AbstractThe critical adhesion energy of benzocyclobutene (BCB)-bonded wafers is quantitatively investigated with focus on BCB thickness, material stack and thermal cycling. The critical adhesion energy depends linearly on BCB thickness, increasing from 19 J/m2 to 31 J/m2 as the BCB thickness increases from 0.4 μm to 2.6 μm, when bonding silicon wafers coated with plasma enhanced chemical vapor deposited (PECVD) silicon dioxide (SiO2). In thermal cycling performed with 350 and 400 oC peak temperatures, the significant increase in critical adhesion energy at the interface between BCB and PECVD SiO2 during the first thermal cycle is attributed to relaxation of residual stress in the PECVD SiO2 layer. On the other hand, the critical adhesion energy at the interface between BCB and PECVD silicon nitride (SiNx) decreases due to the increase of residual stress in the PECVD SiNx layer during the first thermal cycle.

Single Crystal Epitaxial Growth of β-SiC for Device and Integrated Circuit Applications

1987 ◽  
Vol 97 ◽  
Author(s):  
J. D. Parsons
Keyword(s):  
Single Crystal ◽  
Epitaxial Growth ◽  
Integrated Circuit ◽  
High Speed ◽  
Semiconductor Device ◽  
Chemical Vapor ◽  
New Approach ◽  
Growth Environment ◽  
History Of ◽  
Cvd Growth

ABSTRACTBeta SiC is an important semiconductor whose development has been slowed by synthesis difficulties. The physical and electronic properties which make β-SiC desirable for high speed and high power electronics are discussed, with special emphasis on field effect transistor (FET) applications. A history of synthesis efforts is presented to illuminate the obstacles encountered in the growth of semiconductor device quality P-SiC. A new approach to single crystal epitaxy of β-SiC, using TiC as a substrate, is described. The properties of TiC which make it a uniquely suitable substrate for β-SiC epitaxial growth are discussed, and procedures used to prepare TiC surfaces for β-SiC epitaxy are described. The growth process employed at our laboratory, chemical vapor deposition (CVD), is described, and experimental observations of the effects of the CVD growth environment on β-SiC epitaxial growth are presented. Based on these observations, we propose to synthesize β-SiC in a singlesource reaction, using molecules which decompose directly to SiC units. This contrasts with current approaches, which introduce Si and C separately, in molecules which must decompose and subsequently react to form SiC.

Hot-Wire Chemical Vapor Deposition for Epitaxial Silicon Growth On Large-Grained Polycrystalline Silicon Templates

2003 ◽  
Vol 762 ◽  
Author(s):  
M. S. Mason ◽  
C.M. Chen ◽  
H.A. Atwater
Keyword(s):  
Epitaxial Growth ◽  
Polycrystalline Silicon ◽  
Solid Phase ◽  
Chemical Vapor ◽  
Growth Conditions ◽  
Solid Phase Epitaxy ◽  
Epitaxial Silicon ◽  
Hot Wire ◽  
Transmission Electron ◽  
Silicon Growth

AbstractWe investigate low-temperature epitaxial growth of thin silicon films on Si [100] substrates and polycrystalline template layers formed by selective nucleation and solid phase epitaxy (SNSPE). We have grown 300 nm thick epitaxial layers at 300°C on silicon [100] substrates using a high H2:SiH4 ratio of 70:1. Transmission electron microscopy confirms that the films are epitaxial with a periodic array of stacking faults and are highly twinned after approximately 240 nm of growth. Evidence is also presented for epitaxial growth on polycrystalline SNSPE templates under the same growth conditions.

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