High‐performance quasi‐Z‐source inverter with low capacitor voltage stress and small inductance

2015 ◽  
Vol 8 (6) ◽  
pp. 1061-1067 ◽  
Author(s):  
Liqiang Yang ◽  
Dongyuan Qiu ◽  
Bo Zhang ◽  
Guidong Zhang
Author(s):  
J. P. Karunadasa ◽  
I. B. H. Bandara ◽  
W. D. D. Dayananda ◽  
K. G. S. U. Kumara ◽  
G. M. R. Tennakoon

2010 ◽  
Vol 7 (1) ◽  
pp. 70 ◽  
Author(s):  
S. Thangaprakash ◽  
A. Krishnan

 This paper presents a modified control algorithm for Space Vector Modulated (SVM) Z-Source inverters. In traditional control strategies, the Z-Source capacitor voltage is controlled by the shoot through duty ratio and the output voltage is controlled by the modulation index respectively. Proposed algorithm provides a modified voltage vector with single stage controller having one degree of freedom wherein traditional controllers have two degrees of freedom. Through this method of control, the full utilization of the dc link input voltage and keeping the lowest voltage stress across the switches with variable input voltage could be achieved. Further it offers ability of buck-boost operation, low distorted output waveforms, sustainability during voltage sags and reduced line harmonics. The SVM control algorithm presented in this paper is implemented through Matlab/Simulink tool and experimentally verified with Z-source inverter prototype in the laboratory. 


2020 ◽  
Vol 10 (14) ◽  
pp. 4912
Author(s):  
Oswaldo López-Santos ◽  
Germain García

Sliding-mode control (SMC) has been successfully applied to boost inverters, which solves the tracking problem of imposing sinusoidal behavior to the output voltage despite the coupled or decoupled operation of both boost cells in the converter. Most of the results reported in the literature were obtained using the conventional cascade-control structure involving outer loops that generate references for one or two sliding surfaces defined using linear combinations of inductor currents and capacitor voltages. As expected, all proposed methods share the inherent robustness and insensitivity to the uncertainties of SMC, which are the reasons why one of the few comparison criteria between them is the simplicity of their implementation that is evaluated according to the required measurements and mathematical operations. Furthermore, the slight differences between the obtained dynamic performances do not allow a clear distinction of the best solution. This study presents a new SMC approach applied to a boost inverter in which two boost cells are independently commutated. Each of these boost cells integrates an outer loop, enforcing the tracking of harmonic-enriched waveforms to the capacitor voltage. Although this approach increases by two the number of measurements and requires multiloop controllers, it allows effective alleviation of the semiconductor voltage stress by reducing the required voltage gain. A complete analytical study using harmonic balance technique allows deducing a simplified model allowing to obtain a PI controller valid into to the whole set of operation conditions. The several simulation results completely verified the potential of the control proposal and the accuracy of the employed methods.


2017 ◽  
Vol 136 ◽  
pp. 43-50 ◽  
Author(s):  
Yang Song ◽  
Alexander Katsman ◽  
Amy L. Butcher ◽  
David C. Paine ◽  
Alexander Zaslavsky

2018 ◽  
Vol 27 (08) ◽  
pp. 1850127 ◽  
Author(s):  
Vinaya Sagar Kommukuri ◽  
Kanungo Barada Mohanty ◽  
Aditi Chatterjee ◽  
Kishor Thakre

In this paper, a high performance single-phase modified bridgeless AC–DC converter with reduced switch voltage stress for power factor correction (PFC) is introduced. The proposed converter is based on a single-ended primary-inductance converter (SEPIC) to meet the demands of PFC to unity and output voltage regulation. To reduce the number of components, the input bridge is combined with the SEPIC converter since the conventional SEPIC PFC is suffering with high conduction losses. It offers many advantages, such as fewer semiconductor devices in current flowing path which lead to improve the thermal management, low stress on each component, improved efficiency, high power factor compared to classical converter. Detailed analysis and design equations of the converter are presented. Simulation and experimental results are discussed for a 300[Formula: see text]W prototypeunder the universal input voltage (85–235[Formula: see text]V) to validate the performance of the converter.


Author(s):  
Rasool Esmailzadeh ◽  
A. Ajami ◽  
M.R. Banaei

Abstract: With the purpose of rein in the high voltage of flexible power systems, renovation and amendment of multi-level structures aimed at acquisition of high quality voltage is certainly required. In this regard, robust topology must be occupied that encompass the maximum output voltage levels along with minimum of switch number, of course, with taking into account of Peak Inverse Voltage (PIV). In this paper, a neoteric high-performance multilevel cascaded inverter is suggested up to the problem of repetitive output levels to be unraveled and also number of output voltage levels to be maximized. It has been constructed by series-connected multilevel inverters blocks and three-level inverter. The simulation results along with experimental results extracted by manufactured prototype have transparently approved high efficiency of proposed inverter as well as its feasibility. Apart from above, new mathematical approach has been presented to calculate and define the DC voltage sources magnitudes in asymmetric converter.


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