scholarly journals A SiGe 3-stage LNA for automotive radar application from 76 to 81 GHz

2019 ◽  
Vol 30 ◽  
pp. 01004
Author(s):  
Vadim Budnyaev ◽  
Valeriy Vertegel

This paper presents the simulation results of the W-band 3-stage low noise amplifier which is designed in 0.13 μm SiGe BiCMOS technology. The LNA achieves a peak S21 of 24.1 dB and noise figure of 6 dB at 80 GHz with 3 dB bandwidth of 14 GHz from 73 to 87 GHz. S11 is better than 11 dB. The simulated input 1 dB compression point is –23 dBm at 80 GHz with low power consumption of 26 mW from 1.2 V voltage supply. Layout area is 0.36 mm2.

2013 ◽  
Vol 380-384 ◽  
pp. 3287-3291
Author(s):  
Bing Liang Yu ◽  
Xiao Ning Xie ◽  
Wen Yuan Li

A fully integrated low noise amplifier (LNA) for wireless local area network (WLAN) application is presents. The circuit is fabricated in 0.18μm SiGe BiCMOS technology. For the low noise figure, a feedback path is introduced into the traditional inductively degenerated common emitter cascade LNA, which decreases the inductance for input impedance matching, therefore reduces the thermal noise caused by loss resistor. Impedance matching and noise matching are achieved at the same time. Measured results show that the resonance point of the output resonance network shifts from 2.4GHz to 2.8GHz, due to the parasitic effects at the output. At the frequency of 2.8GHz, the LNA achieves 2.2dB noise figure, 19.4dB power gain. The core circuit consumes only 13mW from a 1.8V supply and occupies less than 0.5mm2.


2014 ◽  
Vol 513-517 ◽  
pp. 4580-4584
Author(s):  
Bing Liang Yu ◽  
Jin Li ◽  
Wen Yuan Li

A novel low-noise amplifier (LNA) suitable for COMPASS receiver applications is designed in SiGe-BiCMOS technology. Inductively degenerated technique and resistive feedback technique are employed to reduce the noise figure. With 1.8V power supply, the measured results achieve 17.23dB power gain and 2.58dB noise figure at 1.561GHz.


2015 ◽  
Vol 7 (3-4) ◽  
pp. 339-347 ◽  
Author(s):  
Stefan Malz ◽  
Bernd Heinemann ◽  
Rudolf Lachner ◽  
Ullrich R. Pfeiffer

This paper presents two J-band amplifiers in different 0.13 μm SiGe technologies: a small signal amplifier (SSA) in a technology in which never before gain has been shown over 200 GHz; and a low noise amplifier (LNA) design for 230 GHz applications in an advanced SiGe HBT technology with higher fT/fmax, demonstrating the combination of high gain, low noise, and low power in a single amplifier. Both circuits consist of a four-stage pseudo-differential cascode topology. By employing series–series feedback at the single-stage level the small-signal gain is increased, enabling circuit operation at high-frequencies and with improved efficiency, while maintaining unconditional stability. The SSA was fabricated in a SiGe BiCMOS technology by Infineon with fT/fmax values of 250/360 GHz. It has measured 19.5 dB gain at 212 GHz with a 3 dB bandwidth of 21 GHz. It draws 65 mA from a 3.3 V supply. On the other hand, a LNA was designed in a SiGe BiCMOS technology by IHP with fT/fmaxof 300/450 GHz. The LNA has measured 22.5 dB gain at 233 GHz with a 3 dB bandwidth of 10 GHz and a simulated noise figure of 12.5 dB. The LNA draws only 17 mA from a 4 V supply. The design methodology, which led to these record results, is described in detail with the LNA as an example.


2017 ◽  
Vol 7 (1.3) ◽  
pp. 69
Author(s):  
M. Ramana Reddy ◽  
N.S Murthy Sharma ◽  
P. Chandra Sekhar

The proposed work shows an innovative designing in TSMC 130nm CMOS technology. A 2.4 GHz common gate topology low noise amplifier (LNA) using an active inductor to attain the low power consumption and to get the small chip size in layout design. By using this Common gate topology achieves the noise figure of 4dB, Forward gain (S21) parameter of 14.7dB, and the small chip size of 0.26 mm, while 0.8mW power consuming from a 1.1V in 130nm CMOS gives the better noise figure and improved the overall performance.


2019 ◽  
Vol 30 ◽  
pp. 01006
Author(s):  
Alexander Kozhemyakin ◽  
Ivan Kravchenko

The paper presents design flow and simulation results of the W-band fundamental voltage-controlled oscillator in 0.13 μm SiGe BiCMOS technology for an automotive radar application. Oscillator provides fundamental oscillation range of 76.8 GHz to 81.2 GHz. According to simulation results phase noise is –89.3 dBc/Hz at 1 MHz offset, output power is –5.6 dBm and power consumption is 39 mW from 3.3 V source.


2019 ◽  
Vol 29 (10) ◽  
pp. 2050160
Author(s):  
Guoxiao Cheng ◽  
Zhiqun Li ◽  
Zhennan Li ◽  
Zengqi Wang ◽  
Meng Zhang

This paper presents a highly-integrated transceiver with a differential structure for C-band (5–6[Formula: see text]GHz) radar application using a switchless and baluns-embedded configuration. To reduce the noise figure (NF) in receiver (Rx) mode and enhance the output power in transmitter (Tx) mode, the balun at RF port is embedded into the low-noise amplifier (LNA) and the power amplifier (PA), respectively. Besides, the RF switch is removed by designing the matching networks that both LNA and PA can share. The same topology is also adopted at the IF port. To achieve a high image rejection ratio (IRR), a Hartley architecture using polyphase filters (PPFs) is adopted. The proposed transceiver has been implemented in 1P6M 0.18-[Formula: see text]m CMOS process. The receiver achieves 6.9-dB NF, [Formula: see text]7.5-dBm IIP3 and 26.3-dB gain with three-step digital gain controllability. Also the measured IRR is better than 41[Formula: see text]dBc. The transmitter achieves 9.6-dBm output power and 19.2-dB gain. The chip consumes 106[Formula: see text]mA in the Rx mode and 141[Formula: see text]mA in the Tx mode from the 3.3-V power supply.


Author(s):  
Mikko Varonen ◽  
Nima Sheikhipoor ◽  
Bekari Gabritchidze ◽  
Kieran Cleary ◽  
Henrik Forsten ◽  
...  

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