Characterization of a GaAs/AlGaAs modulation‐doped dynamic random access memory cell

1992 ◽  
Vol 61 (7) ◽  
pp. 834-836 ◽  
Author(s):  
J. S. Kleine ◽  
J. A. Cooper ◽  
M. R. Melloch
2021 ◽  
Vol 21 (8) ◽  
pp. 4216-4222
Author(s):  
Songyi Yoo ◽  
In-Man Kang ◽  
Sung-Jae Cho ◽  
Wookyung Sun ◽  
Hyungsoon Shin

A capacitorless one-transistor dynamic random-access memory cell with a polysilicon body (poly-Si 1T-DRAM) has a cost-effective fabrication process and allows a three-dimensional stacked architecture that increases the integration density of memory cells. Also, since this device uses grain boundaries (GBs) as a storage region, it can be operated as a memory cell even in a thin body device. GBs are important to the memory characteristics of poly-Si 1T-DRAM because the amount of trapped charge in the GBs determines the memory’s data state. In this paper, we report on a statistical analysis of the memory characteristics of poly-Si 1T-DRAM cells according to the number and location of GBs using TCAD simulation. As the number of GBs increases, the sensing margin and retention time of memory cells deteriorate due to increasing trapped electron charge. Also, “0” state current increases and memory performance degrades in cells where all GBs are adjacent to the source or drain junction side in a strong electric field. These results mean that in poly-Si 1T-DRAM design, the number and location of GBs in a channel should be considered for optimal memory performance.


1991 ◽  
Vol 138 (7) ◽  
pp. 2052-2057 ◽  
Author(s):  
P. C. Fazan ◽  
A. Ditali ◽  
C. H. Dennison ◽  
H. E. Rhodes ◽  
H. C. Chan ◽  
...  

1995 ◽  
Vol 34 (Part 1, No. 9B) ◽  
pp. 5178-5183 ◽  
Author(s):  
Cheol Seong Hwang ◽  
Soon Oh Park ◽  
Chang Seok Kang ◽  
Hag-Ju Cho ◽  
Ho-Kyu Kang ◽  
...  

2007 ◽  
Vol 46 (4B) ◽  
pp. 2143-2147 ◽  
Author(s):  
Hoon Jeong ◽  
Yeun Seung Lee ◽  
Sangwoo Kang ◽  
Il Han Park ◽  
Woo Young Choi ◽  
...  

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