Depth localization of positive charge trapped in silicon oxynitride field effect transistors after positive and negative gate bias temperature stress

2011 ◽  
Vol 98 (18) ◽  
pp. 183506 ◽  
Author(s):  
M. Toledano-Luque ◽  
B. Kaczer ◽  
Ph. J. Roussel ◽  
J. Franco ◽  
L. Å. Ragnarsson ◽  
...  
2014 ◽  
Vol 778-780 ◽  
pp. 903-906 ◽  
Author(s):  
Kevin Matocha ◽  
Kiran Chatty ◽  
Sujit Banerjee ◽  
Larry B. Rowland

We report a 1700V, 5.5mΩ-cm24H-SiC DMOSFET capable of 225°C operation. The specific on-resistance of the DMOSFET designed for 1200V applications is 8.8mΩ-cm2at 225°C, an increase of only 60% compared to the room temperature value. The low specific on-resistance at high temperatures enables a smaller die size for high temperature operation. Under a negative gate bias temperature stress (BTS) at VGS=-15 V at 225°C for 20 minutes, the devices show a threshold voltage shift of ΔVTH=-0.25 V demonstrating one of the key device reliability requirements for high temperature operation.


2005 ◽  
Vol 871 ◽  
Author(s):  
Yohai Roichman ◽  
Nir Tessler

AbstractTurn-on dynamics of polymer field effect transistors were examined experimentally over a wide timescale. We found that the source current dependence on time following switch on of the gate bias exhibits a power law at the short time range, and an exponential decay at the intermediate to long time range. We demonstrate that the transistor dynamic behavior is governed by the channel charge build-up, and can be described accurately by a simple capacitor-resistor distributed line model.


2018 ◽  
Vol 140 ◽  
pp. 109-114 ◽  
Author(s):  
Jungkyu Jang ◽  
Sungju Choi ◽  
Jungmok Kim ◽  
Tae Jung Park ◽  
Byung-Gook Park ◽  
...  

2014 ◽  
Vol 25 (15) ◽  
pp. 155201 ◽  
Author(s):  
Kyungjune Cho ◽  
Tae-Young Kim ◽  
Woanseo Park ◽  
Juhun Park ◽  
Dongku Kim ◽  
...  

2008 ◽  
Vol 92 (23) ◽  
pp. 233120 ◽  
Author(s):  
Jongsun Maeng ◽  
Gunho Jo ◽  
Soon-Shin Kwon ◽  
Sunghoon Song ◽  
Jaeduck Seo ◽  
...  

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