Characteristics of surface mount low barrier silicon Schottky diodes with boron contamination in the substrate–epitaxial layer interface

The growth rate of 4H-SiC epi layers has been increased up to 100 µm/h with the use of trichlorosilane instead of silane as silicon precursor. The epitaxial layers grown with this process have been characterized by electrical, optical and structural characterization methods. Schottky diodes, manufactured on the epitaxial layer grown with trichlorosilane at 1600 °C, have higher yield and lower defect density in comparison to diodes realized on epilayers grown with the standard epitaxial process.

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Optimisation of Epitaxial Layer Growth by Schottky Diodes Electrical Characterization

Materials Science Forum ◽

10.4028/www.scientific.net/msf.527-529.199 ◽

2006 ◽

Vol 527-529 ◽

pp. 199-202 ◽

Cited By ~ 1

Author(s):

Francesco La Via ◽

G. Galvagno ◽

A. Firrincieli ◽

Fabrizio Roccaforte ◽

Salvatore di Franco ◽

...

Keyword(s):

Epitaxial Layer ◽

Growth Parameters ◽

Schottky Diodes ◽

Electrical Characterization ◽

Maximum Growth ◽

Deposition Process ◽

Maximum Growth Rate ◽

Layer Growth ◽

Epitaxial Layers ◽

Dilution Ratio

The influence of the epitaxial layer growth parameters on the electrical characteristics of Schottky diodes has been studied in detail. Several diodes were manufactured on different epitaxial layers grown with different Si/H2 ratio and hence with different growth rates. From the electrical characterization a maximum silicon dilution ratio can be fixed at 0.04 %. This limit fixes also a maximum growth rate that can be obtained in the epitaxial growth, with this process, at about 8 μm/h. Several epitaxial layers have been grown, using this dilution ratio, with different temperatures (1550÷1650 °C). At 1600 °C the best compromise between the direct and the reverse characteristics has been found. With this process the yield decreases from 90% for a Schottky diode area of 0.25 mm2 to 61% for the 2 mm2 diodes. Optimizing the deposition process to reduce the defects introduced by the epitaxial process, yield of the order of 80% can be reached on 1 mm2 diodes.

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Double epitaxial layer power Schottky diodes with end in the ramp oxide technique

Microelectronics Journal ◽

10.1016/0026-2692(95)00023-2 ◽

1996 ◽

Vol 27 (1) ◽

pp. 67-72 ◽

Cited By ~ 4

Author(s):

Marian Badila ◽

Gheorghe Brezeanu

Keyword(s):

Epitaxial Layer ◽

Schottky Diodes

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DEFECTS IN MBE SILICON

MRS Proceedings ◽

10.1557/proc-56-27 ◽

1985 ◽

Vol 56 ◽

Cited By ~ 3

Author(s):

R.M. CHRENKO ◽

L.J. SCHOWALTER ◽

E.L. HALL ◽

N. LEWIS

Keyword(s):

Optical Microscopy ◽

Epitaxial Layer ◽

Stacking Faults ◽

Growth Conditions ◽

Layer Interface ◽

Micron Size ◽

Interfacial Defects ◽

Cleaning Procedures ◽

Defect Densities

AbstractA study of defects that are observed in Si MBE layers under certain growth conditions is reported. Optical microscopy examinations of unetched and etched layers reveal particle-like defects of micron size, stacking faults, dislocations, and saucer pits. TEM shows interfacial defects of tens of Angstroms size at the substrate-epitaxial layer interface. Reproducible defect densities are given for various in-situ cleaning procedures.

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