Analysis, design and experimentation of high-pass negative group delay lumped circuit

Circuit World ◽  
2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Hongyu Du ◽  
Rong Yang ◽  
Taochen Gu ◽  
Xiang Zhou ◽  
Samar Yazdani ◽  
...  

Purpose The purpose of this paper is to introduce an innovative theoretical, numerical and experimental investigations on the HP NGD function. The identified HP NGD topology under study is constituted by first order passive RC-network. The simulations and measurements confirm in very good agreement the HP NGD behaviors of the tested circuits. NGD responses with optimal values of about -1 ns and cut-off frequencies of about 20 MHz are obtained. Design/methodology/approach The identified HP NGD topology understudy is constituted by a first-order passive Resistor-capacitor RC network. An innovative approach to HP NGD analysis is developed. The analytical investigation from the voltage transfer function showing the meaning of HP properties is established. Findings This paper introduces innovative theoretical, numerical and experimental investigations on the HP NGD function. Originality/value The NGD characterization as a function of the resistance and capacitance parameters is investigated. The feasibility of the HP NGD function is verified with proofs of concept constituted of lumped surface mounted components on printed circuit boards. The simulations and measurements confirm in very good agreement the HP NGD behaviors of the tested circuits. NGD responses with optimal values of about −1 ns and cut-off frequencies of about 20 MHz are obtained.

Kybernetes ◽  
2016 ◽  
Vol 45 (1) ◽  
pp. 107-125 ◽  
Author(s):  
Dony Hidayat Al-Janan ◽  
Tung-Kuan Liu

Purpose – In this study, the hybrid Taguchi genetic algorithm (HTGA) was used to optimize the computer numerical control-printed circuit boards drilling path. The optimization was performed by searching for the shortest route for the drilling path. The number of feasible solutions is exponentially related to the number of hole positions. The paper aims to discuss these issues. Design/methodology/approach – Therefore, a traveling cutting tool problem (TCP), which is similar to the traveling salesman problem, was used to evaluate the drilling path; this evaluation is considered an NP-hard problem. In this paper, an improved genetic algorithm embedded in the Taguchi method and a neighbor search method are proposed for improving the solution quality. The classical TCP problems proposed by Lim et al. (2014) were used for validating the performance of the proposed algorithm. Findings – Results showed that the proposed algorithm outperforms a previous study in robustness and convergence speed. Originality/value – The HTGA has not been used for optimizing the drilling path. This study shows that the HTGA can be applied to complex problems.


2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Violeta Carvalho ◽  
Bruno Arcipreste ◽  
Delfim Soares ◽  
Luís Ribas ◽  
Nelson Rodrigues ◽  
...  

Purpose This study aims to determine the minimum force required to pull out a surface mount component in printed circuit boards (PCBs) during the wave soldering process through both experimental and numerical procedures. Design/methodology/approach An efficient experimental technique was proposed to determine the minimum force required to pull out a surface mount component in PCBs during the wave soldering process. Findings The results showed that the pullout force is approximately 0.4 N. Comparing this value with the simulated force exerted by the solder wave on the component ( ≅ 0.001158 N), it can be concluded that the solder wave does not exert sufficient force to remove a component. Originality/value This study provides a deep understanding of the wave soldering process regarding the component pullout, a critical issue that usually occurs in the microelectronics industry during this soldering process. By applying both accurate experimental and numerical approaches, this study showed that more tests are needed to evaluate the main cause of this problem, as well as new insights were provided into the depositing process of glue dots on PCBs.


2016 ◽  
Vol 33 (1) ◽  
pp. 23-35 ◽  
Author(s):  
Tomas Blecha

Purpose – The purpose of this paper is to demonstrate the non-destructive methods for detection and localization of interconnection structure discontinuities based on the signal analysis in the frequency and time domain. Design/methodology/approach – The paper deals with the discontinuity characterization of interconnection structures created on substrates used for electronics, and methods for their detection and localization, based on the frequency analysis of transmitted signals. Used analyses are based on the theoretical approach for the solution of discontinuity electrical parameters and are the base for diagnostic methods of discontinuity identification. Findings – The measurement results of reflection parameters, frequency spectrums of transmitted signals and characteristic impedance values are presented on test samples containing multiple line cracks and their width reduction. Practical implications – Obtained results can be used practically, not only for the detection of transmission lines discontinuities on printed circuit boards but also in other applications, such as the quality assessment of bonded joints. Originality/value – Developed methods allow the quick identification and localization of particular discontinuities without the destruction of tested devices.


Circuit World ◽  
2015 ◽  
Vol 41 (3) ◽  
pp. 121-124
Author(s):  
Wojciech Stęplewski ◽  
Mateusz Mroczkowski ◽  
Radoslav Darakchiev ◽  
Konrad Futera ◽  
Grażyna Kozioł

Purpose – The purpose of this study was the use of embedded components technology and innovative concepts of the printed circuit board (PCB) for electronic modules containing field-programmable gate array (FPGA) devices with a large number of pins (e.g. Virtex 6, FF1156/RF1156 package, 1,156 pins). Design/methodology/approach – In the multi-layered boards, embedded passive components that support FPGA device input/output (I/O), such as blocking capacitors and pull-up resistors, were used. These modules can be used in rapid design of electronic devices. In the study, the MC16T FaradFlex material was used for the inner capacitive layer. The Ohmega-Ply RCM 25 Ω/sq material was used to manufacture pull-up resistors for high-frequency pins. The embedded components have been connected to pins of the FPGA component by using plated-through holes for capacitors and blind vias for resistors. Also, a technique for a board-to-board joining, by using castellated terminations, is described. Findings – The fully functional modules for assembly of the FPGA were manufactured. Achieved resistance of embedded micro resistors, as small as the smallest currently used surface-mount device components (01005), was below required tolerance of 10 per cent. Obtained tolerance of capacitors was less than 3 per cent. Use of embedded components allowed to replace the pull-up resistors and blocking capacitors and shortens the signal path from the I/O of the FPGA. Correct connection to the castellated terminations with a very small pitch was also obtained. This allows in further planned studies to create a full signal distribution system from the FPGA without the use of unreliable plug connectors in aviation and space technology. Originality/value – This study developed and manufactured several innovative concepts of signal distribution from printed circuit boards. The signal distribution solutions were integrated with embedded components, which allowed for significant reduction in the signal path. This study allows us to build the target object that is the module for rapid design of the FPGA device. Usage of a pre-designed module would lessen the time needed to develop a FPGA-based device, as a significant part of the necessary work (mainly designing the signal and power fan-out) will already be done during the module development.


2015 ◽  
Vol 27 (1) ◽  
pp. 31-44 ◽  
Author(s):  
M.S. Abdul Aziz ◽  
M.Z. Abdullah ◽  
C.Y. Khor

Purpose – This paper aims to investigate the thermal fluid–structure interactions (FSIs) of printed circuit boards (PCBs) at different component configurations during the wave soldering process and experimental validation. Design/methodology/approach – The thermally induced displacement and stress on the PCB and its components are the foci of this study. Finite volume solver FLUENT and finite element solver ABAQUS, coupled with a mesh-based parallel code coupling interface, were utilized to perform the analysis. A sound card PCB (138 × 85 × 1.5 mm3), consisting of a transistor, diode, capacitor, connector and integrated circuit package, was built and meshed by using computational fluid dynamics pre-processing software. The volume of fluid technique with the second-order upwind scheme was applied to track the molten solder. C language was utilized to write the user-defined functions of the thermal profile. The structural solver analyzed the temperature distribution, displacement and stress of the PCB and its components. The predicted temperature was validated by the experimental results. Findings – Different PCB component configurations resulted in different temperature distributions, thermally induced stresses and displacements to the PCB and its components. Results show that PCB component configurations significantly influence the PCB and yield unfavorable deformation and stress. Practical implications – This study provides PCB designers with a profound understanding of the thermal FSI phenomenon of the process control during wave soldering in the microelectronics industry. Originality/value – This study provides useful guidelines and references by extending the understanding on the thermal FSI behavior of molten solder for PCBs. This study also explores the behaviors and influences of PCB components at different configurations during the wave soldering process.


2014 ◽  
Vol 1049-1050 ◽  
pp. 590-594
Author(s):  
Xiao Dong Zhou ◽  
Chang Wu Xiong

Constrained damping layer (CDL) treatment has been an effective way to suppress vibration level of various structures. by introducing this method into the vibration control system of electronic equipments, this paper firstly discussed the dominant mechanism difference between free damping layer treatment and constrained damping layer treatment, Then base on the constrained layer damping layout optimization method in the vibration system of a rectangle thin board like PCB, a series of experimental investigations were presented on the vibration response of printed circuit boards treated with partial constrained damping layers. as a result, it proves the CDL treatment having good effect on vibration response control of PCBs.


Circuit World ◽  
2015 ◽  
Vol 41 (2) ◽  
pp. 76-79
Author(s):  
Boleslav Psota ◽  
Alexandr Otáhal ◽  
Ivan Szendiuch

Purpose – The main aim of this paper is to investigate the influence of the cavity coverage on the printed circuit boards (PCB) to the resonant frequency, acceleration and displacement. Design/methodology/approach – Tests were realized on four PCBs with different cavity areas. Frequency range of tests was between 10 and 2,000 Hz with 0.3 g acceleration amplitude. In addition, more simulations were performed to check different setups of the boards. Findings – From the calculated and measured data, it is clear that with the larger cavity area the resonance frequency drops. In case a greater number of components placed in cavities are needed on board, it is appropriate to use multiple smaller cavities than the bigger ones. Originality/value – Results in this paper could be very useful for PCB manufacturers and designers during designing of the new PCBs with cavities for dipped components.


2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Muna Ezzi Raypah ◽  
Shahrom Mahmud ◽  
Mutharasu Devarajan ◽  
Anoud AlShammari

Purpose Optimization of light-emitting diodes’ (LEDs’) design together with long-term reliability is directly correlated with their photometric, electric and thermal characteristics. For a given thermal layout of the LED system, the maximum luminous flux occurs at an optimal electrical input power and can be determined using a photo-electro-thermal (PET) theory. The purpose of this study is to extend the application of the luminous flux equation in PET theory for low-power (LP) LEDs. Design/methodology/approach LP surface-mounted device LEDs were mounted on substrates of different thermal resistances. Three LEDs were attached to substrates which were flame-retardant fiberglass epoxy (FR4) and two aluminum-based metal core printed circuit boards (MCPCBs) with thermal conductivities of about 1.0 W/m.K, 2.0 W/m.K and 5.0 W/m.K, respectively. The conjunction of thermal transient tester and thermal and radiometric characterization of LEDs system was used to measure the thermal and optical parameters of the LEDs at a certain range of input current and temperature. Findings The validation of the extended application of the luminous flux equation was confirmed via a good agreement between the practical and theoretical results. The outcomes show that the optimum luminous flux is 25.51, 31.91 and 37.01 lm for the LEDs on the FR4 and the two MCPCBs, respectively. Accordingly, the stipulated maximum electrical input power in the LED datasheet (0.185 W) is shifted to 0.6284, 0.6963 and 0.8838 W between the three substrates. Originality/value Using a large number of LP LEDs is preferred than high-power (HP) LEDs for the same system power to augment the heat transfer and provide a higher luminous flux. The PET theory equations have been applied to HP LEDs using heatsinks with various thermal resistances. In this work, the PET theory luminous flux equation was extended to be used for Indium Gallium Aluminum Phosphide LP LEDs attached to the substrates with dissimilar thermal resistances.


2019 ◽  
Vol 11 (08) ◽  
pp. 787-791
Author(s):  
Xiao-Xiao Yuan ◽  
Li-Heng Zhou ◽  
Jian-Xin Chen

AbstractIn this paper, a novel multilayer substrate integrated dual-mode dielectric resonator (DR) filter is proposed. The square dual-mode DR is made of the high permittivity substrate by removing the undesired portions and the surface coppers so that the relatively high unloaded quality factor of the dominate TM11 pair can be obtained which compared to these fully dielectric-filled substrate integrated waveguides. Meanwhile, it can be easily integrated in an equivalent cavity implemented by multilayer printed circuit boards for filter design, showcasing low in-band loss, light weight, and compact size. For demonstration, a multilayer substrate integrated DR bandpass filter centered at X-band is designed and measured. Good agreement between the simulated and measured results can be observed, and the measured insertion loss at the passband center frequency (8.38 GHz) is 1.1 dB.


Circuit World ◽  
2017 ◽  
Vol 43 (1) ◽  
pp. 9-12 ◽  
Author(s):  
Aneta Arazna ◽  
Kamil Janeczek ◽  
Konrad Futera

Purpose This paper aims to present the results of investigations of inkjet-printed electronic circuits fabricated on a flexible substrate (KAPTON foil) using silver nanoparticles ink. Design/methodology/approach Fully inkjet-printed conductive circuit tracks were printed on a flexible, transparent KAPTON foil, using a commercial 40LT-15 C nanosilver ink as well as a PixDro LP50 inkjet printer with KonicaMinnolta 512 printhead. After cure, electrical properties by resistance measurements and printing quality by optical and SEM microscopic observation of conductive tracks were examined. Afterwards, the tested samples were annealed for 1, 2 and 3 h at 150°C or subjected to cycling bending. Findings It was found that silver nanoparticles ink could be used for the preparation of electronic circuits using the inkjet printing technique. The obtained patterns had appropriate mapping and good quality. It was also noticed that thermal annealing caused a decrease in resistivity values of the tested lines irrespective of their width. Approximately 34 per cent decrease was achieved in the values of resistivity of all the tested lines after the first hour of thermal annealing. After the second hour, the values of resistivity decreased by another 50 per cent. There were no visible changes in resistivity values after 1,000 cycles of bending. Originality/value In this paper, the results of thermal annealing and bending tests of inkjet-printed silver nanoparticle conductive tracks on flexible substrate were presented. That is very important information for producing printed circuit boards using ecological, rapid and low-cost inkjet printing techniques, particularly during the production of printed circuit boards on flexible substrates working in different conditions of mechanical and thermal stresses.


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