Gate oxide reliability assessment of a SiC MOSFET for high temperature aeronautic applications

2013 ◽  
Author(s):  
Thomas Santini ◽  
Morand Sebastien ◽  
Miller Florent ◽  
Luong-Viet Phung ◽  
Bruno Allard
Keyword(s):  
High Temperature ◽  
Reliability Assessment ◽  
Gate Oxide ◽  
Oxide Reliability

10 kV, 87 mΩcm2 Normally-Off 4H-SiC Vertical Junction Field-Effect Transistors

2006 ◽  
Vol 527-529 ◽  
pp. 1187-1190 ◽  
Author(s):  
Yu Zhu Li ◽  
Petre Alexandrov ◽  
Jian Hui Zhang ◽  
Larry X. Li ◽  
Jian Hui Zhao
Keyword(s):  
High Temperature ◽  
High Power ◽  
Field Effect ◽  
Field Effect Transistors ◽  
High Current Density ◽  
Gate Oxide ◽  
High Current ◽  
Oxide Reliability ◽  
Blocking Voltage ◽  
Junction Field Effect Transistors

SiC JFET, compared with SiC MOSFET, is attractive for high power, high temperature applications because it is free of gate oxide reliability issues. Trenched-and-Implanted VJFET (TIVJFET) does not require epi-regrowth and is capable of high current density. In this work we demonstrate two trenched-and-implanted normally-off 4H-SiC vertical junction field-effect transistors (TI-VJFET), based on 120μm, 4.9×1014cm-3 and 100μm, 6×1014cm-3 drift layers. The corresponding devices showed blocking voltage (VB) of 11.1kV and specific on-resistance (RSP_ON) of 124m7cm2, and VB of 10kV and RSP_ON of 87m7cm2. A record-high value for VB 2/RSP_ON of 1149MW/cm2 was achieved for normally-off SiC FETs.

Gate oxide Reliability assessment optimization

2002 ◽  
Vol 42 (9-11) ◽  
pp. 1505-1508
Author(s):  
F. Monsieur ◽  
E. Vincent ◽  
D. Roy ◽  
S. Bruyère ◽  
G. Pananakakis ◽  
...  
Keyword(s):  
Reliability Assessment ◽  
Gate Oxide ◽  
Oxide Reliability

A Novel Approach to Analysis of F-N Tunneling Characteristics in MOS Capacitor Having Oxide Thickness Fluctuation

2016 ◽  
Vol 858 ◽  
pp. 433-436
Author(s):  
Keiichi Yamada ◽  
Junji Senzaki ◽  
Kazutoshi Kojima ◽  
Hajime Okumura
Keyword(s):  
Reliability Assessment ◽  
Gate Oxide ◽  
Oxide Thickness ◽  
Analysis Method ◽  
Mos Capacitor ◽  
Oxide Reliability ◽  
Novel Approach ◽  
Evaluation Time ◽  
Gate Oxide Thickness ◽  
Conduction Properties

The new indicators, effective gate oxide thickness tc and effective gate electrode area D, and their combination are applied for a new analysis method of Fowler-Nordheim (F-N) tunneling characteristics in MOS capacitor having oxide thickness fluctuation. This method considering the conduction properties of F-N tunneling characteristics correlates its characteristics to the oxide reliability. These indicators quantified with the influence of the oxide thickness fluctuation can provide the net values of the electric field and the current density on the gate oxide. This new analysis method will lead to reducing the evaluation time for the reliability assessment.

Reliability of 4H-SiC (0001) MOS Gate Oxide by NO Post-Oxide-Annealing

2019 ◽  
Vol 954 ◽  
pp. 109-113
Author(s):  
Heng Yu Xu ◽  
Cai Ping Wan ◽  
Jin Ping Ao
Keyword(s):  
High Temperature ◽  
Electrical Properties ◽  
Annealing Temperature ◽  
Gate Oxide ◽  
High Annealing Temperature ◽  
Mos Capacitors ◽  
Oxide Reliability ◽  
High Annealing ◽  
Different Temperatures ◽  
Mos Gate

In this work, we investigated the oxide reliability of 4H-SiC (0001) MOS capacitors, the oxide was fabricated about 60 nm by thermal oxidation temperature at 1350°C, the oxides than annealed at different temperatures and times in diluted NO (10% in N2). The 4H-SiC MOS structure was analyzed by C-V and I-V measurement. Compared the J-E curves and Weibull distribution curves of charge-to-breakdown for fives samples under different annealing temperature and time, it shows that the high annealing temperature improves the electrical properties as the lifetime enhanced. The mode value of field-to-breakdown (EBD) for thermal oxides by post-oxide-annealing in NO for 30 min at 1350°C was 10.09 MV/cm, the charge-to-breakdown (QBD) of this sample was the highest in all samples, and the QBD value at 63.2% cumulative failure rate was 0.15 C/cm2. The QBD of the sample annealing at 1200°C for 120 min was 0.06 C/ cm2. The effects of NO annealing in high temperature enhance the lifetime of electrical properties and field-to-breakdown obviously. It can be demonstrated that the annealing temperature as high as 1300°C for 30 min can be used to accelerate TDDB of SiC MOS gate oxide.

Impact of Carbon Cap Annealing on Gate Oxide Reliability on 4H-SiC (000-1) C-Face

2009 ◽  
Vol 615-617 ◽  
pp. 549-552 ◽  
Author(s):  
Shinsuke Harada ◽  
Makoto Kato ◽  
Sachiko Ito ◽  
Kenji Suzuki ◽  
Takasumi Ohyanagi ◽  
...  
Keyword(s):  
High Temperature ◽  
Surface Morphology ◽  
Plasma Etching ◽  
Source Region ◽  
Gate Oxide ◽  
Device Structure ◽  
N Source ◽  
Oxide Reliability ◽  
Temperature Activation ◽  
O2 Plasma

Reliability of the gate oxide is influenced by the device structure and the processes. In the SiC MOSFET, the surface morphology is degraded by the high temperature activation RTA, and the degradation is remarkable on the n+ source region. This study develops the method to suppress the degradation of the reliability of the gate oxide on the carbon face. By utilizing the carbon cap for the RTA and the high density O2 plasma etching to remove the carbon cap, the reliability is drastically improved both on the un-implanted and the implanted surfaces. Especially, the degradation of the reliability is perfectly suppressed on the un-implanted surface.

SiC MOSFET Reliability Update

2012 ◽  
Vol 717-720 ◽  
pp. 1073-1076 ◽  
Author(s):  
Mrinal K. Das ◽  
Sarah K. Haney ◽  
Jim Richmond ◽  
Anthony Olmedo ◽  
Q. Jon Zhang ◽  
...  
Keyword(s):  
High Temperature ◽  
Dielectric Breakdown ◽  
Gate Oxide ◽  
Time Dependent ◽  
Stable Operation ◽  
Gate Bias ◽  
Time Dependent Dielectric Breakdown ◽  
Mos Devices ◽  
Oxide Reliability ◽  
Made In

Significant advancement has been made in the gate oxide reliability of SiC MOS devices to enable the commercial release of Cree’s Z-FET™ product. This paper discusses the key reliability results from Time-Dependent-Dielectric-Breakdown (TDDB) and High Temperature Gate Bias (HTGB) measurements that indicate that the SiC MOSFETs can demonstrate excellent lifetime and stable operation in the field.

Performance and Reliability of SiC MOSFETs for High-Current Power Modules

2010 ◽  
Vol 645-648 ◽  
pp. 1123-1126 ◽  
Author(s):  
Kevin Matocha ◽  
Peter A. Losee ◽  
Arun Gowda ◽  
Eladio Delgado ◽  
Greg Dunne ◽  
...  
Keyword(s):  
High Temperature ◽  
Power Conversion ◽  
Gate Oxide ◽  
Total Current ◽  
High Current ◽  
Large Area ◽  
Oxide Reliability ◽  
Power Modules ◽  
Blocking Voltage ◽  
Packaging Technique

We address the two critical challenges that currently limit the applicability of SiC MOSFETs in commercial power conversion systems: high-temperature gate oxide reliability and high total current rating. We demonstrate SiC MOSFETs with predicted gate oxide reliability of >106 hours (100 years) operating at a gate oxide electric field of 4 MV/cm at 250°C. To scale to high total currents, we develop the Power Overlay planar packaging technique to demonstrate SiC MOSFET power modules with total on-resistance as low as 7.5 m. We scale single die SiC MOSFETs to high currents, demonstrating a large area SiC MOSFET (4.5mm x 4.5 mm) with a total on-resistance of 30 m, specific on-resistance of 5 m-cm2 and blocking voltage of 1400V.

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