Investigation on effect of coupling agents in epoxy based underfill material for flip chip application

2002 ◽  
Author(s):  
Shijian Luo ◽  
C.P. Wong
Keyword(s):  
Flip Chip ◽  
Coupling Agents ◽  
Underfill Material

Intermetallic Growth and Void Formation Mechanism in Flip Chip Copper Pillar Interconnects: Role of the Underfill Material

2021 ◽  
Author(s):  
Miao Wang ◽  
Trent Uehling ◽  
Amar Mavinkurve ◽  
Paige Uehling ◽  
Sudan Ahmed ◽  
...  
Keyword(s):  
Formation Mechanism ◽  
Flip Chip ◽  
Void Formation ◽  
Intermetallic Growth ◽  
Underfill Material

Underfill Assessments and Validations for Low-k FCBGA

2006 ◽  
Author(s):  
Nicholas Kao ◽  
Jeng Yuan Lai ◽  
Jase Jiang ◽  
Yu Po Wang ◽  
C. S. Hsiao
Keyword(s):  
Finite Element ◽  
High Speed ◽  
Flip Chip ◽  
Failure Modes ◽  
Solder Bump ◽  
Material Selection ◽  
Coefficient Of Thermal Expansion ◽  
Electrical Performance ◽  
Low K ◽  
Underfill Material

With the trend of electronic consumer product toward more functionality, high performance and miniaturization, IC chip is required to deliver more I/Os signals and better electrical characteristics under same package form factor. Thus, Flip Chip BGA (FCBGA) package was developed to meet those requirements offering better electrical performance, more I/O pins accommodation and high transmission speed. For high-speed application, the low dielectric constant (low-k) material that can effectively reduce the signal delays is extensively used in IC chips. However, the low-k material possesses fragile mechanical property and high coefficient of thermal expansion (CTE) compared with silicon chip, which raises the reliability concerns of low-k material integrated into IC chip. The typical reliability failure modes are low-k layer delamination and bump crack under temperature loading during assembly and reliability test. Delamination is occurred in the interface between low-k dielectric layers and underfill material at chip corner. Bump crack is at Under Bump Metallization (UBM) corner. Thus, the adequate underfill material selection becomes very important for both solder bump and low-k chips [1]. This paper mainly characterized FCBGA underfill materials to guide the adequate candidates to prevent failures on low-k chip and solder bump. Firstly, test vehicle was a FCBGA package with heat spreader and was investigated the thermal stress by finite element models. In order to analyze localized low-k structures, sub-modeling technique is used for underfill characterizations. Then, the proper underfill candidates picked from modeling results were experimentally validated by reliability tests. Finally, various low-k FCBGA package structures were also studied with same finite element technique.

The effect of PECVD SiNxmoisture barrier layers on the degradation of a flip chip underfill material

2001 ◽  
Vol 13 (3) ◽  
pp. 12-15 ◽  
Author(s):  
G. Kaltenpoth ◽  
W. Siebert ◽  
X‐M. Xie ◽  
F. Stubhan
Keyword(s):  
Flip Chip ◽  
Barrier Layers ◽  
Underfill Material
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