CPU Package Design Optimization for Performance Improvement and Package Cost reduction

The dynamic puncture resistance of multi-layer integrated composite which was comprised of glass fabric reinforcement or Kevlar fabric reinforcement and nonwovens were discussed as related to recycled Kevlar fibers amount, number of layer and K-ply position for purpose of cost reduction and performance improvement. The result shows that, 20 wt% Kevlar fibers contained in nonwovens have the optimum puncture resistance. And the dynamic puncture force increases linearly with number of layers, and also improves proportionally as increasing number of K-ply. The resultant multi-layer composite is expected to be used as body armor interlayer and packaging materials.

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Package Design Optimization of the Fan-out Interposer System

2021 IEEE 71st Electronic Components and Technology Conference (ECTC) ◽

10.1109/ectc32696.2021.00015 ◽

2021 ◽

Author(s):

Sang Kyu Kim ◽

Sangwook Park ◽

Seung Yong Cha ◽

Sang Nam Jung ◽

Gyongbum Kim ◽

...

Keyword(s):

Design Optimization ◽

Package Design

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Performance Improvement of RF Inductors Using LTCC Technology

Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) ◽

10.4071/cicmt-2011-ta23 ◽

2011 ◽

Vol 2011 (CICMT) ◽

pp. 000054-000058 ◽

Cited By ~ 3

Author(s):

Goran Radosavljević ◽

Andrea Marić ◽

Walter Smetana ◽

Ljiljana Živanov

Keyword(s):

Experimental Data ◽

Low Temperature ◽

Design Optimization ◽

Quality Factor ◽

Performance Improvement ◽

Air Gap ◽

Frequency Range ◽

Operating Frequency Range ◽

Rf Inductors ◽

First Time

This paper presents for the first time a parallel comparison of the performance of RF inductors realized on different substrate configurations. Presented inductors are meander type structures fabricated in Low Temperature Co-fired Ceramic (LTCC) technology. Also, chosen material is never before implemented for inductor fabrication. The performance improvement is achieved by design optimization of different substrate configurations that incorporate placement of an air-gap beneath the inductor and/or introduction of an additional shielding layer on the top. Designed structures are characterized on the basis of simulation and experimental data, achieving good correlation between obtained results. Presented results show over 30 % increase in quality factor and widening of the operating frequency range by over 55 %.

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A Non-Through Silicon Via 1000+ IO Package On Package Solution For Wide IO Applications

International Symposium on Microelectronics ◽

10.4071/isom-2013-ta36 ◽

2013 ◽

Vol 2013 (1) ◽

pp. 000094-000099 ◽

Cited By ~ 4

Author(s):

Laura Mirkarimi ◽

Rajesh Katkar ◽

Ron Zhang ◽

Rey Co ◽

Zhijun Zhao

Keyword(s):

Finite Element Analysis ◽

Finite Element ◽

Design Optimization ◽

High Yield ◽

Element Analysis ◽

Package Design ◽

Simulation Methodology ◽

Structural Modifications ◽

Simulation Tools ◽

Large Bandwidth

We are developing a new solution for wide I/O package on package applications, which is Bond Via Array (BVA) technology. The prototype vehicle built in this study has 1020 I/O's at a pitch of 0.24 mm with a high aspect ratio of approximately 10:1 and is ≤1.4 mm tall. PoP applications require large bandwidth and thinner packages challenging package developers to address warpage control for high yield processes. The design optimization of this package was established through rigorous finite element analysis of materials selection and structural modifications. The simulation methodology was validated by measuring the warpage as a function of temperature for the experimental prototypes. The details for the simulation and verification processes for the wide I/O process will be discussed. The variation between finite element analysis predictions and the experimental builds was ~10%, which allowed us to complete package design optimization with our simulation tools. The prototype build includes a standard and a low CTE substrate.

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