Thermal laser stimulation effects on NMOS transistor

Author(s):  
A. Firiti ◽  
G. Haller ◽  
D. Lewis ◽  
P. Fouillat ◽  
P. Perdu ◽  
...  

Author(s):  
A. Sarafianos ◽  
R. Llido ◽  
O. Gagliano ◽  
V. Serradeil ◽  
M. Lisart ◽  
...  

Abstract This paper presents the electrical model of an NMOS transistor in 90nm technology under 1064nm Photoelectric Laser Stimulation. The model was built and tuned from measurements made on test structures and from the results of physical simulation using Finite Element Modeling (TCAD). The latter is a useful tool in order to understand and correlate the effects seen by measurement by given a physical insight of carrier generation and transport in devices. This electrical model enables to simulate the effect of a continuous laser wave on an NMOS transistor by taking into account the laser’s parameters (i.e. spot size and power), spatial parameters (i.e. the spot location and the NMOS’ geometry) and the NMOS’ bias. It offers a significant gain of time for experiment processes and makes it possible to build 3D photocurrent cartographies generated by the laser on the NMOS, in order to predict its response independently of the laser beam location.





2011 ◽  
Vol 30 (2) ◽  
pp. 27-31
Author(s):  
V. Ponomarchuk ◽  
◽  
N. Khramenko ◽  
O. Guzun ◽  
Barudi Abdul Moneim ◽  
...  


Author(s):  
Magdalena Sienkiewicz ◽  
Philippe Rousseille

Abstract This paper presents a case study on scan test reject in a mixed mode IC. It focuses on the smart use of combined mature FA techniques, such as Soft Defect Localization (SDL) and emission microscopy (EMMI), to localize a random scan test anomaly at the silicon bulk level.



Author(s):  
Dominique Carisetti ◽  
Nicolas Sarazin ◽  
Nathalie Labat ◽  
Nathalie Malbert ◽  
Arnaud Curutchet ◽  
...  

Abstract To improve the long-term stability of AlGaN/GaN HEMTs, the reduction of gate and drain leakage currents and electrical anomalies at pinch-off is required. As electron transport in these devices is both coupled with traps or surface states interactions and with polarization effects, the identification and localization of the preeminent leakage path is still challenging. This paper demonstrates that thermal laser stimulation (TLS) analysis (OBIRCh, TIVA, XIVA) performed on the die surface are efficient to localize leakage paths in GaN based HEMTs. The first part details specific parameters, such as laser scan speed, scan direction, wavelength, and laser power applied for leakage gate current paths identification. It compares results obtained with Visible_NIR electroluminescence analysis with the ones obtained by the TLS techniques on GaN HEMT structures. The second part describes some failure analysis case studies of AlGaN/GaN HEMT with field plate structure which were successful, thanks to the OBIRCh technique.



Author(s):  
Chunlei Wu ◽  
Suying Yao

Abstract Lock-in IR-OBIRCH analysis, as a kind of static thermal laser stimulation (S-TLS) technique, is very effective to isolate a fault for the parametric failure cases. However, its capability is limited to localize a defect when the IC is operated under a defined operating condition. Whereas the dynamic thermal laser stimulation (D-TLS) technique is good at locating a fault while the IC is operated under some functions to activate the failure. In this paper, a novel method is presented to realize DTLS just by Lock-in IR-OBIRCH assisted with a Current Detection Probe Head. Two cases are studied to demonstrate the effectiveness of this method.



Author(s):  
V. Pouget ◽  
E. Faraud ◽  
K. Shao ◽  
S. Jonathas ◽  
D. Horain ◽  
...  

Abstract This paper presents the use of pulsed laser stimulation with picosecond and femtosecond laser pulses. We first discuss the resolution improvement that can be expected when using ultrashort laser pulses. Two case studies are then presented to illustrate the possibilities of the pulsed laser photoelectric stimulation in picosecond single-photon and femtosecond two-photon modes.



Author(s):  
Jonathan Shaw ◽  
Christopher McMahon ◽  
Yin Shyang Ng ◽  
Félix Beaudoi

Abstract This paper presents the use of Dynamic Laser Stimulation (DLS) and Time-Resolved DLS (TR-DLS) to provide fail site localization and complementary information on a failed embedded memory IC. In this study, an embedded dual port RAM within a 90nm IC that failed one of the Memory Built-In Self Tests (MBISTs) was investigated. This technique rapidly localized the failing area within the memory read/write circuitry. The TR-DLS provided maps for each operation of the MBIST pattern. With this information, the failure was clearly identified as a read operation failure. The TR-DLS technique also provided much refined site signature (down to just one net) within the sense amp of the Port B of the dual port RAM. This information provided very specific indication on how to improve the operation of that particular sense amp circuitry within the dual port RAM Memory.



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