Top-Gate Low-Threshold Voltage $p\hbox{-}\hbox{Cu}_{2} \hbox{O}$ Thin-Film Transistor Grown on $\hbox{SiO}_{2}/ \hbox{Si}$ Substrate Using a High-$\kappa$ HfON Gate Dielectric

2010 ◽  
Vol 31 (8) ◽  
pp. 827-829 ◽  
Author(s):  
Xiao Zou ◽  
Guojia Fang ◽  
Longyan Yuan ◽  
Meiya Li ◽  
Wenjie Guan ◽  
...  
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Gate Dielectric ◽  
Thin Film Transistor ◽  
Si Substrate ◽  
Low Threshold

A New Top Gate Pentacene Organic Thin Film Transistor Employing Vapor Deposited Polyimide as A Gate Dielectric

2006 ◽  
Vol 937 ◽  
Author(s):  
Chang-Wook Han ◽  
Sang-Geun Park ◽  
Chang-Yeon Kim ◽  
Min-Koo Han ◽  
Gun-Woo Hyung ◽  
...  
Keyword(s):  
Thin Film ◽  
Breakdown Voltage ◽  
Threshold Voltage ◽  
Gate Dielectric ◽  
Thin Film Transistor ◽  
Polyimide Film ◽  
Organic Thin Film ◽  
Organic Thin Film Transistor ◽  
Ft Ir

ABSTRACTA top gate pentacene TFT employing vapor deposited polyimide as a gate dielectric was fabricated. Polyimide was co-evaporated from 6FDA and ODA monomers and annealed at 150 °C in vacuum. The degree of imidization was verified by FT-IR. A breakdown voltage of 0.9 MV/cm of polyimide film was measured by MIM structure. A top gate pentacene TFT with W/L=25 has 0.01 cm2/Vs as a mobility, about 103 as an on-off ratio (In/off), −7.5V as a threshold voltage and 9 V per decade as a sub-threshold slope.

MODELING OF TRAPPING INDUCED THRESHOLD VOLTAGE SHIFT DEPENDENCY ON A TIME-VARYING GATE BIAS IN THIN-FILM TRANSISTORS

2012 ◽  
Vol 26 (23) ◽  
pp. 1250153
Author(s):  
TAEHO JUNG
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Discrete Model ◽  
Gate Dielectric ◽  
Thin Film Transistor ◽  
Charge Trapping ◽  
Time Varying ◽  
Threshold Voltage Shift ◽  
Exponential Time ◽  
Discrete States

The author has developed a discrete model for simulation to calculate the threshold voltage (VT) shift caused by charge trapping and detrapping in a thin film transistor (TFT) under a time-varying bias. The model divides continuous states into discrete states and simplifies tunneling among the discrete states to keep track of their occupancies. The simulation is carried out for a TFT that has traps in the gate dielectric uniformly distributed perpendicular to the semiconductor/dielectric interface and the results account for the stretched-exponential time dependence of VT shift.

scholarly journals Effect of Novel Nanocomposite Materials for Enhancing Performance of Thin Film Transistor TFT Model

2016 ◽  
Vol 5 (1) ◽  
pp. 1
Author(s):  
Youssef Ahmed Mobarak ◽  
Moamen Atef
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Gate Dielectric ◽  
Low Cost ◽  
Thin Film Transistor ◽  
Analytical Models ◽  
Short Channel ◽  
High K ◽  
Wide Range ◽  
Low K

<span>The potential impact of high permittivity gate dielectrics on thin film transistors short channel and circuit performance has been studied using <a name="OLE_LINK110"></a><a name="OLE_LINK118"></a>highly accurate analytical models. In addition, the gate-to-channel capacitance and parasitic fringe capacitances have been extracted. The suggested model in this paper has been <a name="OLE_LINK37"></a><a name="OLE_LINK36"></a>increased the surface potential and decreased the <a name="OLE_LINK93"></a><a name="OLE_LINK92"></a>threshold voltage, whenever the conventional silicon dioxide gate dielectric<a name="OLE_LINK290"></a><a name="OLE_LINK280"></a> is replaced by high-K gate dielectric novel nanocomposite PVP/La<sub>2</sub>O<sub>3</sub>K<sub>ox</sub>=25. Also, it has been investigated that a decrease in parasitic outer fringe capacitance and gate-to-channel capacitance, whenever the conventional silicon nitride is replaced by low-K gate sidewall spacer dielectric novel nanocomposite PTFE/SiO<sub>2</sub>K<sub>sp</sub>=2.9. Finally, it has been demonstrated that using low-K gate sidewalls with high-K gate insulators can be decreased the gate fringing field and threshold voltage. In addition, fabrication of nanocomposites from polymers and nano-oxide particles found to have potential candidates for using it in a wide range of applications in low cost due to low process temperature of these nanocomposites materials.</span>

Fabrication of Organic Thin Film Transistors Using Low Temperature, Soluble Silicon Oxide as the Gate Dielectrics

2006 ◽  
Vol 965 ◽  
Author(s):  
Jeng-Hua Wei ◽  
HorngJiunn Lin ◽  
Ying-Ren Chen
Keyword(s):  
Thin Film ◽  
Silicon Oxide ◽  
Gate Dielectric ◽  
Gate Dielectrics ◽  
Thin Film Transistor ◽  
Gate Insulator ◽  
Breakdown Field ◽  
Organic Thin Film ◽  
Water Based ◽  
Low Threshold

ABSTRACTIn this paper, a unique water-based, liquid phase deposited silicon oxide (LPD SiO2) is adapted to the fabrication process of the organic thin film transistor (OTFT). Through the use of this process, an OTFT with a silicon oxide gate insulator is successfully fabricated at 100°C or less. At this low process temperature, the SiO2 functions efficiently as a gate dielectric with the breakdown field being larger than 5 MV/cm, the leakage current being near 1 pA/um2 with a gate bias of 20 V and the surface roughness being less than 1nm. Due to the high quality silicon oxide, the oxide-gated OTFT shows the low threshold voltage (-1 ∼ -2V) and medium on/off current ratio (∼1000). Because this oxide is a water-based process, it is highly resistant to the following soluble semiconductor material and its solvent.

scholarly journals Synthesis of ZnO Nanoparticles to Fabricate a Mask-Free Thin-Film Transistor by Inkjet Printing

2012 ◽  
Vol 2012 ◽  
pp. 1-8 ◽  
Author(s):  
Chao-Te Liu ◽  
Wen-Hsi Lee ◽  
Tsu-Lang Shih
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Zno Nanoparticles ◽  
Inkjet Printing ◽  
Carrier Mobility ◽  
Gate Dielectric ◽  
Low Cost ◽  
Thin Film Transistor ◽  
Flexible Displays ◽  
Active Channel

We report a low-cost, mask-free, reduced material wastage, deposited technology using transparent, directly printable, air-stable semiconductor slurries and dielectric solutions. We have demonstrate an emerging process for fabricating printable transistors with ZnO nanoparticles as the active channel and poly(4-vinylphenol) (PVP) matrix as the gate dielectric, respectively, and the inkjet-printed ZnO TFTs have shown to exhibit the carrier mobility of 0.69 cm2/Vs and the threshold voltage of 25.5 V. We suggest that the printable materials and the printing technology enable the use of all-printed low-cost flexible displays and other transparent electronic applications.

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