Effect of Leakage Currents in Adiabatic Logic Circuits at Lower Technology Nodes

2019 ◽  
Author(s):  
Tridib Sarma ◽  
Chetan D. Parikh
Keyword(s):  
Logic Circuits ◽  
Leakage Currents ◽  
Adiabatic Logic ◽  
Technology Nodes

Nmos Logic Circuits in Laser-Crystallized Silicon on Quartz

1983 ◽  
Vol 23 ◽  
Author(s):  
A. Chiang ◽  
M. H. Zarzycki ◽  
W. P. Meuli ◽  
N. M. Johnson
Keyword(s):  
High Performance ◽  
Logic Circuits ◽  
Leakage Currents ◽  
Enhancement Mode ◽  
Low Leakage ◽  
Fused Quartz ◽  
Amorphous Substrates ◽  
Circular Beam ◽  
Processing Steps ◽  
Dynamic Shift

ABSTRACTDepletion mode as well as enhancement mode n-channel thin-film transistors (TFT's) have been fabricated in CO2 laser-crystallized silicon on fused quartz. Nearly defect-free islands were obtained by using an offset circular beam to form a tilted melt interface. The optimization of subsequent processing steps to achieve simultaneously low leakage currents and voltage thresholds appropriate for depletion-load NMOS circuits involved adjustments of ion implantation and high temperature cycles with the aid of simulation. The resultant high performance silicon-gate TFT's have led to NMOS ring oscillators with 2.5 ns delay/stage and dynamic shift registers with MHz clock rates. These are the first logic circuits fabricated in beam-crystallized silicon on bulk amorphous substrates.

Power-Clock Gating in Adiabatic Logic Circuits

2005 ◽  
pp. 638-646 ◽  
Author(s):  
Philip Teichmann ◽  
Jürgen Fischer ◽  
Stephan Henzler ◽  
Ettore Amirante ◽  
Doris Schmitt-Landsiedel
Keyword(s):  
Logic Circuits ◽  
Clock Gating ◽  
Adiabatic Logic

Four-phase power clock generator for adiabatic logic circuits

2002 ◽  
Vol 38 (14) ◽  
pp. 689 ◽  
Author(s):  
A. Bargagli-Stoffi ◽  
G. Iannaccone ◽  
S. Di Pascoli ◽  
E. Amirante ◽  
D. Schmitt-Landsiedel
Keyword(s):  
Logic Circuits ◽  
Clock Generator ◽  
Adiabatic Logic

Near-Threshold Flip-Flops Using Clocked Adiabatic Logic in Nanometer CMOS Processes

2011 ◽  
Vol 460-461 ◽  
pp. 837-842 ◽  
Author(s):  
Hai Yan Ni ◽  
Jian Ping Hu
Keyword(s):  
Single Phase ◽  
Energy Savings ◽  
Logic Circuits ◽  
Sequential Circuits ◽  
Clock Generator ◽  
Nanometer Cmos ◽  
Wide Range ◽  
Adiabatic Logic ◽  
Auxiliary Signal ◽  
Near Threshold

This paper presents adiabatic flip-flops operating on near-threshold supply voltages. The near-threshold adiabatic flip-flops and sequential circuits are realized with improved CAL (Clocked Adiabatic Logic) circuits using a single-phase power clock. An auxiliary clock generator is used to obtain the non-overlap sinusoidal auxiliary signal pair. A near-threshold mode-10 counter is implemented. All circuits are simulated using Predictive Technology Model (PTM) 45nm process. The near-threshold adiabatic circuits attain large energy savings over a wide range of frequencies, as compared with conventional static CMOS logic circuits.

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