Miniaturization of semiconductor devices is the main driving force to achieve
an outstanding performance of modern integrated circuits. As the industry is
focusing on the development of the 3nm technology node, it is apparent that
transistor scaling shows signs of saturation. At the same time, the
critically high power consumption becomes incompatible with the global
demands of sustaining and accelerating the vital industrial growth,
prompting an introduction of new solutions for energy efficient
computations. Probably the only radically new option to reduce power
consumption in novel integrated circuits is to introduce nonvolatility. The
data retention without power sources eliminates the leakages and refresh
cycles. As the necessity to waste time on initializing the data in
temporarily unused parts of the circuit is not needed, nonvolatility also
supports an instanton computing paradigm. The electron spin adds additional
functionality to digital switches based on field effect transistors.
SpinFETs and SpinMOSFETs are promising devices, with the nonvolatility
introduced through relative magnetization orientation between the
ferromagnetic source and drain. A successful demonstration of such devices
requires resolving several fundamental problems including spin injection
from metal ferromagnets to a semiconductor, spin propagation and relaxation,
as well as spin manipulation by the gate voltage. However, increasing the
spin injection efficiency to boost the magnetoresistance ratio as well as an
efficient spin control represent the challenges to be resolved before these
devices appear on the market. Magnetic tunnel junctions with large
magnetoresistance ratio are perfectly suited as key elements of nonvolatile
CMOS-compatible magnetoresistive embedded memory. Purely electrically
manipulated spin-transfer torque and spin-orbit torque magnetoresistive
memories are superior compared to flash and will potentially compete with
DRAM and SRAM. All major foundries announced a near-future production of
such memories. Two-terminal magnetic tunnel junctions possess a simple
structure, long retention time, high endurance, fast operation speed, and
they yield a high integration density. Combining nonvolatile elements with
CMOS devices allows for efficient power gating. Shifting data processing
capabilities into the nonvolatile segment paves the way for a new low power
and high-performance computing paradigm based on an in-memory computing
architecture, where the same nonvolatile elements are used to store and to
process the information.
A Survey on the Modeling of Magnetic Tunnel Junctions for Circuit Simulation
