scholarly journals TCAD Modeling of Cryogenic nMOSFET ON-State Current and Subthreshold Slope

Author(s):  
Prabjot Dhillon ◽  
Nguyen Cong Dao ◽  
Philip H. W. Leong ◽  
Hiu Yung Wong
Keyword(s):  
1996 ◽  
Vol 424 ◽  
Author(s):  
H. C. Slade ◽  
M. S. Shur ◽  
S. C. Deane ◽  
M. Hack

AbstractWe have examined the material properties and operation of bottom-gate amorphous silicon thin film transistors (TFTs) using temperature measurements of the subthreshold current. From the derivative of current activation energy with respect to gate bias, we have deduced information about the density of states for several different transistor types. We have demonstrated that, in TFTs with thin active layers and top nitride passivation, the current conduction channel moves from the gate insulator interface to the passivation insulator interface as the transistor switches off. Our 2D simulations clarify these experimental results. We have examined the effect of bias stress on the transistors and analyzed the resulting reduction in the subthreshold slope. Based on these results, we have extended our analytic amorphous silicon TFI SPICE model to include the effect of bias stress.


2007 ◽  
Vol 28 (3) ◽  
pp. 217-219 ◽  
Author(s):  
Meishoku Masahara ◽  
Radu Surdeanu ◽  
Liesbeth Witters ◽  
Gerben Doornbos ◽  
Viet H. Nguyen ◽  
...  

2012 ◽  
Vol 9 (1) ◽  
pp. 37-42
Author(s):  
Umesh P. Gomes ◽  
Kumud Ranjan ◽  
Subhra Chowdhury ◽  
Palash Das ◽  
Servin Rathi ◽  
...  

In this paper the strain effects on the performance and reliability of future digital III-V device are discussed. Strain is incorporated in the device during fabrication, packaging, and operation. A high amount of strain can introduce defects and cracks in the epilayer. The band structure of the active device region is also altered due to strain. These strain induced changes determine performance, reliability, and lifetime of the device. Therefore, it is necessary to consider strain effects while designing a device for a particular application. Here, compressive-strain-induced changes are used as design parameters and their impact on the logic performance of the device is studied. It is interpreted that the design significantly decreases the gate leakage current and improves the subthreshold slope.


2010 ◽  
Vol 54 (2) ◽  
pp. 213-219 ◽  
Author(s):  
S. Burignat ◽  
D. Flandre ◽  
M.K. Md Arshad ◽  
V. Kilchytska ◽  
F. Andrieu ◽  
...  

2012 ◽  
Vol 2012 ◽  
pp. 1-4 ◽  
Author(s):  
Sheng-Po Chang ◽  
San-Syong Shih

We reported on the performance and electrical properties of co-sputtering-processed amorphous hafnium-indium-zinc oxide (α-HfIZO) thin film transistors (TFTs). Co-sputtering-processedα-HfIZO thin films have shown an amorphous phase in nature. We could modulate the In, Hf, and Zn components by changing the co-sputtering power. Additionally, the chemical composition ofα-HfIZO had a significant effect on reliability, hysteresis, field-effect mobility (μFE), carrier concentration, and subthreshold swing (S) of the device. Our results indicated that we could successfully and easily fabricateα-HfIZO TFTs with excellent performance by the co-sputtering process. Co-sputtering-processedα-HfIZO TFTs were fabricated with an on/off current ratio of~106, higher mobility, and a subthreshold slope as steep as 0.55 V/dec.


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