ScienceGate
Advanced Search
Author Search
Journal Finder
Blog
Sign in / Sign up
ScienceGate
Search
Author Search
Journal Finder
Blog
Sign in / Sign up
Dual Material Double-Layer Gate Stack SON MOSFET: A Novel Architecture for Enhanced Analog Performance—Part I: Impact of Gate Metal Workfunction Engineering
IEEE Transactions on Electron Devices
◽
10.1109/ted.2007.910564
◽
2008
◽
Vol 55
(1)
◽
pp. 372-381
◽
Cited By ~ 21
Author(s):
Poonam Kasturi
◽
Manoj Saxena
◽
Mridula Gupta
◽
R. S. Gupta
Keyword(s):
Double Layer
◽
Gate Stack
◽
Analog Performance
◽
Dual Material
Download Full-text
Related Documents
Cited By
References
A Dual Material Double-Layer Gate Stack Junctionless Transistor for Enhanced Analog Performance
Communications in Computer and Information Science - VLSI Design and Test
◽
10.1007/978-3-642-42024-5_15
◽
2013
◽
pp. 118-127
◽
Cited By ~ 2
Author(s):
Ratul Kumar Baruah
◽
Roy P. Paily
Keyword(s):
Double Layer
◽
Gate Stack
◽
Analog Performance
◽
Junctionless Transistor
◽
Dual Material
Download Full-text
Dual-Material Double-Layer Gate Stack SON MOSFET: A Novel Architecture for Enhanced Analog Performance—Part II: Impact of Gate-Dielectric Material Engineering
IEEE Transactions on Electron Devices
◽
10.1109/ted.2007.910567
◽
2008
◽
Vol 55
(1)
◽
pp. 382-387
◽
Cited By ~ 14
Author(s):
Poonam Kasturi
◽
Manoj Saxena
◽
Mridula Gupta
◽
R. S. Gupta
Keyword(s):
Double Layer
◽
Gate Dielectric
◽
Dielectric Material
◽
Gate Stack
◽
Material Engineering
◽
Analog Performance
◽
Dual Material
◽
Gate Dielectric Material
Download Full-text
Gate-All-Around Charge Plasma-Based Dual Material Gate-Stack Nanowire FET for Enhanced Analog Performance
IEEE Transactions on Electron Devices
◽
10.1109/ted.2018.2816898
◽
2018
◽
Vol 65
(7)
◽
pp. 3026-3032
◽
Cited By ~ 14
Author(s):
Sarabdeep Singh
◽
Ashish Raman
Keyword(s):
Gate Stack
◽
Charge Plasma
◽
Analog Performance
◽
Dual Material
Download Full-text
Performance Analysis of Gate-Stack Dual-Material DG MOSFET Using Work-Function Modulation Technique for Lower Technology Nodes
Silicon
◽
10.1007/s12633-021-01095-3
◽
2021
◽
Author(s):
Satish K. Das
◽
Umakanta Nanda
◽
Sudhansu M. Biswal
◽
Chandan Kumar Pandey
◽
Lalat Indu Giri
Keyword(s):
Performance Analysis
◽
Work Function
◽
Gate Stack
◽
Modulation Technique
◽
Dg Mosfet
◽
Technology Nodes
◽
Dual Material
Download Full-text
Charge-plasma based dual-material and gate-stacked architecture of junctionless transistor for enhanced analog performance
Superlattices and Microstructures
◽
10.1016/j.spmi.2015.10.017
◽
2015
◽
Vol 88
◽
pp. 582-590
◽
Cited By ~ 19
Author(s):
S. Intekhab Amin
◽
R.K. Sarin
Keyword(s):
Charge Plasma
◽
Analog Performance
◽
Junctionless Transistor
◽
Dual Material
Download Full-text
Surface potential based Analytical Modeling of Graded Channel Strained High-k Gate stack Dual-Material Double Gate MOSFET
2019 Devices for Integrated Circuit (DevIC)
◽
10.1109/devic.2019.8783284
◽
2019
◽
Cited By ~ 1
Author(s):
Pritha Banerjee
◽
Priyanka Saha
◽
Dinesh Kumar Dash
◽
Subir Kumar Sarkar
Keyword(s):
Surface Potential
◽
Analytical Modeling
◽
Double Gate
◽
Gate Stack
◽
High K
◽
Double Gate Mosfet
◽
Dual Material
Download Full-text
Comparison study of Dual Material Gate Silicon on Insulator junctionless Transistor and with Junction Transistor for Analog Performance
International Journal of Materials Mechanics and Manufacturing
◽
10.18178/ijmmm.2019.7.3.448
◽
2019
◽
Vol 7
(3)
◽
pp. 144-149
Author(s):
S. C. Wagaj
◽
◽
S. C. Patil
Keyword(s):
Silicon On Insulator
◽
Comparison Study
◽
Analog Performance
◽
Junctionless Transistor
◽
Junction Transistor
◽
Dual Material
Download Full-text
Gate - Stack Dual Metal (DM) Nanowire FET with Enhanced Analog Performance for High Frequency Applications
2021 Devices for Integrated Circuit (DevIC)
◽
10.1109/devic50843.2021.9455919
◽
2021
◽
Author(s):
Neeraj
◽
Shobha Sharma
◽
Anubha Goel
◽
Sonam Rewari
◽
R S Gupta
Keyword(s):
High Frequency
◽
Gate Stack
◽
Analog Performance
◽
Dual Metal
Download Full-text
The impact of gate misalignment on the analog performance of a dual-material double gate junctionless transistor
Journal of Semiconductors
◽
10.1088/1674-4926/36/9/094001
◽
2015
◽
Vol 36
(9)
◽
pp. 094001
◽
Cited By ~ 2
Author(s):
S. Intekhab Amin
◽
R. K. Sarin
Keyword(s):
Double Gate
◽
Analog Performance
◽
Junctionless Transistor
◽
The Impact
◽
Dual Material
Download Full-text
3-D analytical modeling of high-k gate stack dual-material tri-gate strained silicon-on-nothing MOSFET with dual-material bottom gate for suppressing short channel effects
Journal of Computational Electronics
◽
10.1007/s10825-017-1002-y
◽
2017
◽
Vol 16
(3)
◽
pp. 631-639
◽
Cited By ~ 16
Author(s):
Pritha Banerjee
◽
Subir Kumar Sarkar
Keyword(s):
Analytical Modeling
◽
Strained Silicon
◽
Short Channel Effects
◽
Gate Stack
◽
Short Channel
◽
High K
◽
Channel Effects
◽
Dual Material
◽
Bottom Gate
Download Full-text
Sign in / Sign up
Close
Export Citation Format
Close
Share Document
Close