Study on Various Device Structures for Steep-Switching Silicon-on-Insulator Feedback Field-Effect Transistors

2020 ◽  
Vol 67 (4) ◽  
pp. 1852-1858
Author(s):  
Changhoon Lee ◽  
Changhwan Shin
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Silicon On Insulator ◽  
Device Structures

TEM characterization of SiGe heterolayers grown on SIMOX

1991 ◽  
Vol 49 ◽  
pp. 886-887
Author(s):  
N. David Theodore ◽  
Peter Fejes ◽  
Mamoru Tomozane ◽  
Ming Liaw
Keyword(s):  
Vapor Deposition ◽  
Infrared Detectors ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Chemical Vapor ◽  
Silicon On Insulator ◽  
Strain Fields ◽  
Device Structures ◽  
Defect Densities

SiGe heterolayers are of interest for use in heterojunction transistors, infrared detectors and field-effect transistors. SIMOX (Separation of silicon by IMplanted OXygen) is useful for fabrication of silicon-on-insulator (SOI) structures (electrically isolated from the substrate). SIMOX could potentially be used for isolation of SiGe structures from the substrate. Epitaxial-Si grown on SIMOX (required for some device structures) can have grown-in dislocations that arise due to STMOX-related damage. If SiGe heterolayers were grown on silicon, dislocations could interact with the strain fields associated with the SiGe layers. Such interaction could possibly lead to a reduction in defect densities in upper layers of the structures. In the present study, SiGe heterolayers grown on SIMOX by chemical vapor deposition were characterized using TEM. The structures consisted of epi-silicon grown on a Si/Sii-xGex superlattice which was in turn grown on a Si/SiO2 (SIMOX) structure. The behavior of defects in the structures was of interest.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

New device structures for graphene nanoribbon field effect transistors

2016 ◽  
Vol 6 (3) ◽  
pp. 265-270 ◽  
Author(s):  
Mahdiar Ghadiry ◽  
Harith Ahmad ◽  
Chong Wu Yi ◽  
Asrulnizam Abd Manaf
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Graphene Nanoribbon ◽  
New Device ◽  
Device Structures

Low Temperature Device Processing Technology for II-VI Semiconductors

1989 ◽  
Vol 161 ◽  
Author(s):  
D.L. Dreifus ◽  
R.M. Kolbas ◽  
B.P. Sneed ◽  
J.F. Schetzina
Keyword(s):  
Low Temperature ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Epitaxial Layers ◽  
Processing Technologies ◽  
Device Processing ◽  
Device Structures ◽  
Lift Off ◽  
Processing Steps

ABSTRACTLow temperature (<60° C) processing technologies that avoid potentially damaging processing steps have been developed for devices fabricated from II-VI semiconductor epitaxial layers grown by photoassisted molecular beam epitaxy (MBE). These low temperature technologies include: 1) photolithography (1 µm geometries), 2) calibrated etchants (rates as low as 30 Å/s), 3) a metallization lift-off process employing a photoresist profiler, 4) an interlevel metal dielectric, and 5) an insulator technology for metal-insulator-semiconductor (MIS) structures. A number of first demonstration devices including field-effect transistors and p-n junctions have been fabricated from II-VI epitaxial layers grown by photoassisted MBE and processed using the technology described here. In this paper, two advanced device structures, processed at <60° C, will be presented: 1) CdTe:As-CdTe:In p-n junction detectors, grown in situ by photoassisted MBE, and 2) HgCdTe-HgTe-CdZnTe quantum-well modulation-doped field-effect transistors (MODFETs).

Self-Aligned Asymmetric Metal–Oxide–Semiconductor Field Effect Transistors Fabricated on Silicon-on-Insulator

2009 ◽  
Vol 48 (9) ◽  
pp. 091201
Author(s):  
Jong Pil Kim ◽  
Jae Young Song ◽  
Sang Wan Kim ◽  
Jae Hyun Park ◽  
Woo Young Choi ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Silicon On Insulator ◽  
Oxide Semiconductor
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