Heterojunction Negative-Capacitance Tunnel-FET as a Promising Candidate for Sub-0.4V VDD Digital Logic Circuits
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2018 ◽
Vol 1
(2)
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pp. 65-76
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2012 ◽
Vol 33
(2)
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pp. 281-283
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2012 ◽
Vol 100
(6)
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pp. 2033-2049
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