Heterojunction Negative-Capacitance Tunnel-FET as a Promising Candidate for Sub-0.4V VDD Digital Logic Circuits

Author(s):  
Sourav Guha ◽  
Prithviraj Pachal
2020 ◽  
Vol 4 (3) ◽  
pp. 29-39
Author(s):  
Sulkhiya Gazieva ◽  

The future of labor market depends upon several factors, long-term innovation and the demographic developments. However, one of the main drivers of technological change in the future is digitalization and central to this development is the production and use of digital logic circuits and its derived technologies, including the computer,the smart phone and the Internet. Especially, smart automation will perhaps not cause e.g.regarding industries, occupations, skills, tasks and duties


Author(s):  
Mario Rossainz-López ◽  
Carmen Cerón-Garnica ◽  
Etelvina Archundia-Sierra ◽  
Patricia Cervantes-Márquez ◽  
David Carrasco-Limón ◽  
...  

2014 ◽  
Vol 1693 ◽  
Author(s):  
David T. Clark ◽  
Robin F. Thompson ◽  
Aled E. Murphy ◽  
David A. Smith ◽  
Ewan P. Ramsay ◽  
...  

ABSTRACTWe present the characteristics of a high temperature CMOS integrated circuit process based on 4H silicon carbide designed to operate at temperatures beyond 300°C. N-channel and P-channel transistor characteristics at room and elevated temperatures are presented. Both channel types show the expected low values of field effect mobility well known in SiC MOSFETS. However the performance achieved is easily capable of exploitation in CMOS digital logic circuits and certain analogue circuits, over a wide temperature range.Data is also presented for the performance of digital logic demonstrator circuits, in particular a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. Devices are packaged in high temperature ceramic dual in line (DIL) packages, which are capable of greater than 300°C operation. A high temperature “micro-oven” system has been designed and built to enable testing and stressing of units assembled in these package types. This system heats a group of devices together to temperatures of up to 300°C while keeping the electrical connections at much lower temperatures. In addition, long term reliability data for some structures such as contact chains to n-type and p-type SiC and simple logic circuits is summarized.


2012 ◽  
Vol 33 (2) ◽  
pp. 281-283 ◽  
Author(s):  
Jaeseok Jeon ◽  
Louis Hutin ◽  
Ruzica Jevtic ◽  
Nathaniel Liu ◽  
Yenhao Chen ◽  
...  

2012 ◽  
Vol 100 (6) ◽  
pp. 2033-2049 ◽  
Author(s):  
Garrett S. Rose ◽  
Jeyavijayan Rajendran ◽  
Harika Manem ◽  
Ramesh Karri ◽  
Robinson E. Pino

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