Performance investigation of charge plasma based dual material gate junctionless transistor

2016 IEEE Uttar Pradesh Section International Conference on Electrical, Computer and Electronics Engineering (UPCON) ◽

10.1109/upcon.2016.7894646 ◽

2016 ◽

Author(s):

S. Intekhab Amin ◽

Sunny Anand ◽

R. K. Sarin

Keyword(s):

Charge Plasma ◽

Junctionless Transistor ◽

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Charge-plasma based dual-material and gate-stacked architecture of junctionless transistor for enhanced analog performance

Superlattices and Microstructures ◽

10.1016/j.spmi.2015.10.017 ◽

2015 ◽

Vol 88 ◽

pp. 582-590 ◽

Author(s):

S. Intekhab Amin ◽

R.K. Sarin

Keyword(s):

Charge Plasma ◽

Analog Performance ◽

Junctionless Transistor ◽

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A charge-plasma-based dual-metal-gate recessed-source/drain dopingless junctionless transistor with enhanced analog and RF performance

Journal of Computational Electronics ◽

10.1007/s10825-020-01528-z ◽

2020 ◽

Vol 19 (3) ◽

pp. 1085-1099

Author(s):

Prateek Kishor Verma ◽

Yogesh Kumar Verma ◽

Varun Mishra ◽

Santosh Kumar Gupta

Keyword(s):

Charge Plasma ◽

Junctionless Transistor ◽

Rf Performance ◽

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A Dual Material Double-Layer Gate Stack Junctionless Transistor for Enhanced Analog Performance

Communications in Computer and Information Science - VLSI Design and Test ◽

10.1007/978-3-642-42024-5_15 ◽

2013 ◽

pp. 118-127 ◽

Author(s):

Ratul Kumar Baruah ◽

Roy P. Paily

Keyword(s):

Double Layer ◽

Analog Performance ◽

Junctionless Transistor ◽

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Comparison study of Dual Material Gate Silicon on Insulator junctionless Transistor and with Junction Transistor for Analog Performance

International Journal of Materials Mechanics and Manufacturing ◽

10.18178/ijmmm.2019.7.3.448 ◽

2019 ◽

Vol 7 (3) ◽

pp. 144-149

Author(s):

S. C. Wagaj ◽

◽

S. C. Patil

Keyword(s):

Silicon On Insulator ◽

Comparison Study ◽

Analog Performance ◽

Junctionless Transistor ◽

Junction Transistor ◽

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Contact engineered charge plasma junctionless transistor for suppressing tunneling leakage

International Journal of Numerical Modelling Electronic Networks Devices and Fields ◽

10.1002/jnm.2812 ◽

2020 ◽

Vol 34 (1) ◽

Author(s):

Harendra Kumar ◽

Sangeeta Singh ◽

Kumari Nibha Priyadarshani ◽

Jayanta Ghosh ◽

Alok Naugarhiya

Keyword(s):

Charge Plasma ◽

Junctionless Transistor

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Modelling and Analysis of Dual Material Gate Charge Plasma Based Vertical t-shaped TFET

Silicon ◽

10.1007/s12633-021-01518-1 ◽

2021 ◽

Author(s):

Prabin Kumar Bera ◽

Rajib Kar ◽

Durbadal Mandal

Keyword(s):

Charge Plasma ◽

Dual Material ◽

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The impact of gate misalignment on the analog performance of a dual-material double gate junctionless transistor

Journal of Semiconductors ◽

10.1088/1674-4926/36/9/094001 ◽

2015 ◽

Vol 36 (9) ◽

pp. 094001 ◽

Author(s):

S. Intekhab Amin ◽

R. K. Sarin

Keyword(s):

Double Gate ◽

Analog Performance ◽

Junctionless Transistor ◽

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A Dual-Material Gate Junctionless Transistor With High-$k$ Spacer for Enhanced Analog Performance

IEEE Transactions on Electron Devices ◽

10.1109/ted.2013.2292852 ◽

2014 ◽

Vol 61 (1) ◽

pp. 123-128 ◽

Author(s):

Ratul K. Baruah ◽

Roy P. Paily

Keyword(s):

High K ◽

Analog Performance ◽

Junctionless Transistor ◽

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Source/Drain Engineered Charge-Plasma Junctionless Transistor for the Immune of Line Edge Roughness Effect

IEEE Transactions on Electron Devices ◽

10.1109/ted.2018.2812241 ◽

2018 ◽

Vol 65 (5) ◽

pp. 1873-1879 ◽

Author(s):

Wenbo Wan ◽

Haijun Lou ◽

Ying Xiao ◽

Xinnan Lin

Keyword(s):

Line Edge Roughness ◽

Roughness Effect ◽

Charge Plasma ◽

Edge Roughness ◽

Junctionless Transistor

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Modeling of dual material surrounding split gate junctionless transistor as biosensor

Superlattices and Microstructures ◽

10.1016/j.spmi.2019.106290 ◽

2019 ◽

Vol 135 ◽

pp. 106290 ◽

Author(s):

Muktasha Maji ◽

Gaurav Saini

Keyword(s):

Junctionless Transistor ◽

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