Combined air humidity and flow CMOS microsensor with on-chip 15 bit sigma-delta A/D interface

Analog signals from gas sensors are used to recognize all types of VOC (Volatile Organic Compound) substances, such as toxic gases, tobacco or ethanol. The processes to recognize these substances include acquisition, treatment and machine learning for classification, which can all be efficiently implemented on a Field Programmable Gate Array (FPGA) aided by Low-Voltage Differential Signaling (LVDS). This article proposes a low-cost 11-bit effective number of bits (ENOB) sigma-delta Analog to Digital Converter (ADC), with an SNR of 75.97 dB and an SFDR of 72.28 dB, whose output is presented on screen in real time, thanks to the use of a Linux System on Chip (SoC) system that enables parallelism, high-level programming and provides a working environment for the scientific treatment of gas sensor signals. The high frequency achieved by the implemented ADC allows for multiplexing the capture of several analog signals with an optimal resolution. Additionally, several ADCs can be implemented in the same FPGA so several analog signals can be digitalized in parallel.

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A triple-channel incremental zoom-ADC for 3-DoF MEMS digital gyroscopes

Modern Physics Letters B ◽

10.1142/s0217984920501365 ◽

2020 ◽

Vol 34 (13) ◽

pp. 2050136

Author(s):

Risheng Lv ◽

Weiping Chen ◽

Qiang Fu ◽

Liang Yin ◽

Yufeng Zhang ◽

...

Keyword(s):

Noise Suppression ◽

Signal To Noise Ratio ◽

Cmos Technology ◽

Hybrid Architecture ◽

Dynamic Element Matching ◽

Loop Filter ◽

Sigma Delta ◽

Analog To Digital ◽

Synchronous Sampling ◽

On Chip

This paper presents a multiplexed analog-to-digital converter (ADC) consisting mainly of high-precision sampling holders (S/H) and an incremental zoom ADC. Flip-around design is employed in S/H modules for power economy and noise suppression. Based on efficient coordination between S/H and multiplexers, synchronous sampling is available in the whole triple-channel ADC to maintain phase accordance. The core converter employed a hybrid architecture of successive approximation register (SAR) and Sigma-Delta [Formula: see text], which constitutes an energy-efficient zoom ADC. Final conversion result is a combination of the two steps. Both the SAR and [Formula: see text] modulation share a third-order loop filter to compromise between systematic stability and input range. On-chip digital logic include capacitor array controlling and dynamic-element-matching (DEM) technique. Manufactured in a standard [Formula: see text]m CMOS technology, the whole chip occupies an area of 2.7 mm2. Experimental results show a maximum signal-to-noise ratio (SNR) of 100.2 dB, with a power consumption of 2.1 mW from a 5 V supply.

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Design and System-Level Simulation of a Novel On-Chip Test Based on Macromodels

Key Engineering Materials ◽

10.4028/www.scientific.net/kem.483.38 ◽

2011 ◽

Vol 483 ◽

pp. 38-42 ◽

Cited By ~ 1

Author(s):

Le Guan ◽

Jia Li Gao ◽

Jin Kui Chu

Keyword(s):

Krylov Subspace ◽

Test System ◽

Differential Capacitance ◽

System Level ◽

Sigma Delta Modulator ◽

Sigma Delta ◽

Electrothermal Actuator ◽

System Level Simulation ◽

Circuit Components ◽

On Chip

The methods of on-chip integrated testing have a wide application with the development of the study for MEMS materials properties measurement in microscale. A novel on-chip integrated micro-tensile testing system is designed through system-level simulation based on macromodels to measure the fracture strength and fatigue mechanical properties of polysilicon thin films. The structure of testing instrument consists of V-beam electrothermal actuator, differential capacitance sensor, supporting spring and specimen. The capacitance signal is sensed and controlled by a second sigma-delta modulator circuit. The analytic macromodel of polysilicon thin film specimen considering geometric nonlinearity and the numerical reduced-order model of V-beam electrothermal actuator based on Krylov subspace projection are created separately and described in the MAST hardware language. The mechanical structure dimension size and circuit components parameters are determined and optimized according to system-level simulation. The computing result has shown that the self-build macromodels and the on-chip integrated test system are efficient and reliable.

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An Ultra Low Power CMOS Sigma Delta ADC Modulator for System-on-chip (SoC) Temperature Sensor for Aerospace Applications

International Journal of Reconfigurable and Embedded Systems (IJRES) ◽

10.11591/ijres.v7.i1.pp12-20 ◽

2018 ◽

Vol 7 (1) ◽

pp. 12

Author(s):

Deepak Prasad ◽

Vijay Nath

Keyword(s):

Low Power ◽

Temperature Sensor ◽

Operational Amplifier ◽

System On Chip ◽

Digital Converter ◽

Sigma Delta ◽

Analog To Digital ◽

Aerospace Applications ◽

On Chip ◽

Sigma Delta Adc

In the current paper, an accurate with low power consumed sigma delta (ΣΔ) analog to digital converter has been designed for the aerospace applications. The sigma delta ADC has been designed in such a way that it works fine with consumption of low power and high accuracy in the system on chip (SoC) temperature sensor where the analog output from the temperature sensor unit will be the fed to the analog to digital converter. To check the robustness, different parameters with variation has been analyzed. The high gain operational amplifier plays a vital role in the circuits design. Hence, a 30 MHz operational amplifier has also been proposed whose unity gain bandwidth (UGB) has been observed of about 30 MHz, 51.1dB dc gain and slew rate (SR) of about 27.9 V/ μsec. For the proper operation of the circuit, a power supply of +1.3V to -1.3V is used. The proposed sigma delta ADC modulator is showing better results over previously designed modulator in terms of power consumption, error and performance. The design and simulation have been tested with the help of cadence analog design environment with UMC 90nm CMOS process technology.

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