Prediction of Liquid Formation for Solder and Non-Solder Mask Defined Array Packages

1999 ◽  
Vol 124 (1) ◽  
pp. 37-44 ◽  
Author(s):  
Wen-Hwa Chen ◽  
Kuo-Ning Chiang ◽  
Shu-Ru Lin

This study presents an efficient method to accurately predict solder joint geometry after a reflow process. The proposed method can be utilized for Solder Mask Defined (SMD), Non-Solder Mask Defined (NSMD), or C4 type solder joints. The reflow process involves several design factors capable of influencing the final shape of the molten solder joint, such as solder joint volume, restoring force, surface tension, contact angle, pad thickness, and pad size. These factors are all considered in the calculations. The computed results are compared with those using the Surface Evolver program and also with available numerical/experimental results. Their excellent agreement shows that the method developed herein can be practically applied to predict the reflow shape of SMD/NSMD solder joints. The difference between SMD and NSMD is also examined in detail. Results in this study provide designers with a fundamental guideline for accurately predicting the liquid formation of solder joints during the reflow process.

2018 ◽  
Vol 2018 (1) ◽  
pp. 000534-000542
Author(s):  
Ephraim Suhir ◽  
Sung Yi ◽  
Jennie S. Hwang ◽  
R. Ghaffarian

Abstract The “head-in-pillow” (HnP) defects in lead-free solder joint interconnections of IC packages with conventional (small) stand-off heights of the solder joints, and particularly in packages with fine pitches, are attributed by many electronic material scientists to the three major causes: 1) attributes of the manufacturing process, 2) solder material properties and 3)design-related issues. The latter are thought to be caused primarily by elevated stresses in the solder material, as well as by the excessive warpage of the PCB-package assembly and particularly to the differences in the thermally induced curvatures of the PCB and the package. In this analysis the stress-and-warpage issue is addressed using an analytical predictive stress model. This model is a modification and an extension of the model developed back in 1980-s by the first author. It is assumed that it is the difference in the post-fabrication deflections of the PCB-package assembly that is the root cause of the solder materials failures and particularly and perhaps the HnP defects. The calculated data based on the developed analytical thermal stress model suggest that the replacement of the conventional ball-grid-array (BGA) designs with designs characterized by elevated stand-off heights of the solder joints could result in significant stress and warpage relief and, hopefully, in a lower propensity of the IC package to HnP defects as well. The general concepts are illustrated by a numerical example, in which the responses to the change in temperature of a conventional design referred to as ball-grid-array (BGA) and a design with solder joints with elevated stand-off heights referred to as column-grid-array (CGA) are compared. The computed data indicated that the effective stress in the solder material is relieved by about 40% and the difference between the maximum deflections of the PCB and the package is reduced by about 60%, when the BGA design is replaced by a CGA system. Although no proof that the use of solder joints with elevated stand-off heights will lessen the package propensity to the HnP defects is provided, the authors think that there is a reason to believe that the application of solder joints with elevated stand-off heights could result in a substantial improvement in the general IC package performance, including, perhaps, its propensity to HnP defects.


1999 ◽  
Vol 123 (2) ◽  
pp. 127-131 ◽  
Author(s):  
Kuo-Ning Chiang ◽  
Chang-Ming Liu

As electronic packaging technology moving to the CSP, wafer level packaging, fine pitch BGA (ball grid array) and high density interconnections, the wireability of the PCB/substrate and soldering technology are as important as reliability issues. In this work, a comparison of elliptical/round pads of area array type packages has been studied for soldering, reliability, and wireability requirements. The objective of this research is to develop numerical models for predicting reflow shapes of solder joint under elliptical/round pad boundary conditions and to study the reliability issue of the solder joint. In addition, a three-dimensional solder liquid formation model is developed for predicting the geometry, the restoring force, the wireability, and the reliability of solder joints in an area array type interconnections (e.g., ball grid array, flip chip) under elliptical and round pad configurations. In general, the reliability of the solder joints is highly dependent on the thermal-mechanical behaviors of the solder and the geometry configuration of the solder ball. These reliability factors include standoff height/contact angle of the solder joint, and the geometry layout/material properties of the package. An optimized solder pad design cannot only lead to a good reliability life of the solder joint but also can achieve a better wireability of the substrate. Furthermore, the solder reflow simulation used in this study is based on an energy minimization engine called Surface Evolver and the finite element software ABAQUS is used for thermal stress/strain nonlinear analysis.


2019 ◽  
Vol 16 (1) ◽  
pp. 13-20
Author(s):  
Ephraim Suhir ◽  
Sung Yi ◽  
Jennie S. Hwang ◽  
Reza Ghaffarian

Abstract The “head-in-pillow” (HnP) defects in lead-free solder joint interconnections of Integrated Circuit (IC) packages with conventional (small) standoff heights of the solder joints, and particularly in packages with fine pitches, are attributed by many electronic material scientists to the three major causes: attributes of the manufacturing process, solder material properties, and design-related issues. The latter are thought to be caused primarily by elevated stresses in the solder material, as well as by the excessive warpage of the Printed Circuit Board (PCB)-package assembly and particularly by the differences in the thermally induced curvatures of the PCB and the package. In this analysis, the stress and warpage issue is addressed using an analytical predictive stress model. The model is a modification and an extension of the model developed back in 1980s by the first author. It is assumed that it is the difference in the postfabrication deflections of the PCB-package assembly that is the root cause of the solder material failures and particularly and perhaps the HnP defects. The calculated data based on the developed stress model suggest that the replacement of the conventional ball grid array (BGA) designs with designs with elevated standoff heights of the solder joints could result in significant stress and warpage relief and, hopefully, in a lower propensity of the IC package to HnP defects as well. The general concepts are illustrated by a numerical example, in which the responses to the change in temperature of a conventional design, referred to as BGA, and a design with solder joints with elevated standoff heights, referred to as column grid array (CGA), are compared. The computed data indicated that the effective stress in the solder material was relieved by about 40% and the difference between the maximum deflections of the PCB and the package was reduced by about 60%, when the BGA design was replaced by a CGA system. Although no definite proof that the use of solder joints with elevated standoff heights will lessen the package propensity to the HnP defects is provided, the authors nonetheless think that there is a reason to believe that the application of solder joints with elevated standoff heights could result in a substantial improvement in the general IC package performance, including, perhaps, its propensity to HnP defects.


1998 ◽  
Vol 120 (2) ◽  
pp. 141-144 ◽  
Author(s):  
X. Wu ◽  
X. Dou ◽  
C.-P. Yeh ◽  
K. Waytt

The failure of electrical devices associated with solder joints has become one of the most critical reliability issues for surface-mounted devices. Solder joint reliability performance has been found to be highly dependent on the solder joint configuration, which, in turn, is governed by bond pad size, alloy material, and leadframe structure, as well as solder reflow characteristics. To investigate tombstone effects causing solder joint failure during leadless component reflow process, this work has focused on (1) developing a numerical model for the simulations of the solder joint formation during the reflow process, and (2) determining possibility that a tombstone effect for the leadless component may occur by analyzing the force and torque in the problem. Using this methodology, the tombstone effect associated with different pad geometry configurations and solder paste amount has been analyzed through the application of the public domain software tool Surface Evolver. Simulations show that the tombstoning is very sensitive to pad/component geometry design, solder surface tension, solder paste volume, wetting area, and wetting angle. This model simulation can be used to determine optimal solder paste volume, pad geometry configurations, and solder material for avoiding tombstone effects.


2003 ◽  
Vol 125 (1) ◽  
pp. 153-156 ◽  
Author(s):  
Y. C. Chan ◽  
S. H. Fan ◽  
J. K. L. Lai

In this study, the diffusion behavior and microstructural evolution of Cu-Sn intermetallics at eutectic Sn-Pb solder/copper substrate interface of PBGA solder joints was studied. The PBGA solder joints were formed by different profiles, which was devised to have the same “heating factor”—the integral of the measured temperature above the liquidus (183°C) with respect to dwell time in the reflow profile, but to have different conveyor speeds. Using the theory of heat transmission, it is shown that the solder joint cooling rate during solidification increases with increasing conveyor speed. As a result, the “crystallization degree” of the solder joint microstructure decreased with the increasing of cooling rate. The thickness of IMC layer increased with extension of aging time. The growth of IMC is a diffusion-controlled process, i.e., tin diffuses into copper, and the diffusion coefficient in the “disordered region” Db is much bigger than that in the “crystallization region” Dl, so the IMC growth rate of solder joint with faster cooling rate was larger. On the other hand, although Db>Dl at all temperatures, the difference increases as temperature decrease, consequently, the difference of IMC thickness growth among different cooling rate solder joints varied according to the aging temperature.


2017 ◽  
Vol 29 (3) ◽  
pp. 144-150 ◽  
Author(s):  
Yeqing Tao ◽  
Dongyan Ding ◽  
Ting Li ◽  
Jason Guo ◽  
Guoliang Fan

Purpose This paper aims to study the influence of reflow atmosphere and placement accuracy on the solderability of 01005 capacitor/SAC305 solder joints. Design/methodology/approach The 01005 capacitors were mounted on OSP-coated pads, and the samples were fabricated in four different atmospheres, i.e. 200 ppm O2/N2, 1,000 ppm O2/N2, 3,000 ppm O2/N2 and air. After the reflow process, visual inspection and X-ray detection were carried out to examine the solder joint shapes and possible defects. Some of the samples fabricated in different conditions were cross-sectioned and the solder joint microstructures were analyzed. On the other hand, besides placing the components on their normal pad positions, a 50 per cent offset of the x-axis (long axis) or y-axis (short axis) was introduced into the chip mounter programs to evaluate the 01005 capacitor’s assembly sensitivity to placement accuracy. The process-induced defects were investigated. Findings Experimental results indicated that an N2-based protective atmosphere was necessary for 01005 type assembly, as it could obviously improve the 01005 solder joint quality, compared with the air condition. The protective atmosphere had little effect on the appearance, quality and microstructure of solder joints when the oxygen concentration was below 3,000 ppm. But a very low oxygen concentration could increase the risk of tombstoning defects for the assembly process. The N2-based protective atmosphere containing 1,000-2000 ppm O2 was acceptable and appropriate for the assembly of tiny components. Originality/value The results of this work provide a set of reflow process parameters and recommendations for 01005 size component assembly in manufacturing.


2017 ◽  
Vol 29 (2) ◽  
pp. 85-91 ◽  
Author(s):  
Yan Zhu ◽  
Fenglian Sun

Purpose The purpose of this paper is to investigate the effect of geometric size on intermetallic compound (IMC) growth and elements diffusion of Cu/Sn/Cu solder joint and establish the correlation model between the thickness of the IMC layer and size of the solder joint on the dozens of microns scale. Design/methodology/approach The sandwich-structured Cu/Sn/Cu solder joints with different gaps between two copper-clad plates (δ) are fabricated using a reflow process. The microstructure and composition of solder joints are observed and analyzed by scanning electron microscopy. Findings After reflow, the thickness of the IMC and Cu concentration in solder layers increase with the reduction of δ from 50, 40, 30, 20 to 10 μm. During isothermal aging, the thickness of the IMC fails to increase according to the traditional parabolic rule due to changes in Cu concentration. The reduction of δ is the root cause of changes in Cu concentration and the growth rule of the IMC layer. A correlation model between the thickness of the IMC layer and δ is established. It is found that the thickness of the IMC layer is the function of aging time and δ. With δ reducing, the main control element of IMC growth transfers from Cu to Sn. Originality/value This paper shows the changes of IMC thickness and elements concentration with the reduction of the size of solder joints on the dozens of microns scale. A correlation model is established to calculate the thickness of the IMC layer during aging.


2005 ◽  
Vol 128 (4) ◽  
pp. 331-338 ◽  
Author(s):  
Wen-Hwa Chen ◽  
Shu-Ru Lin ◽  
Kuo-Ning Chiang

An accurate and efficient analytical geometric method is presented for predicting the geometric parameters of the controlled collapse chip connection type solder joint using direct chip attach technology after a reflow process. By this method, the meridian of the solder joint is first discretized as a series of sufficiently fine fragmental arcs. After calculating the internal pressure inside the molten eutectic solder from the forces balance, the meridional and circumferential radii of curvature of each arc are then obtained from the Laplace-Young equation. As a result, the coordinates of each node of the arc and the solder joint geometry can be determined in turn. The factors that affect the final shape of the molten eutectic solder joints, including the solder volumes, external loading, pad size, surface tension of molten eutectic solder, and interfacial surface tension between the molten eutectic solder and the solid high-lead bump are considered herein. The results computed by the analytical geometric method are also compared with those obtained using the Surface Evolver program, the extended Heinrich’s model, and the experimental results. The results of the various approaches are mutually consistent.


2007 ◽  
Vol 353-358 ◽  
pp. 2593-2596
Author(s):  
Ouk Sub Lee ◽  
Man Jae Hur ◽  
Yeon Chang Park ◽  
Dong Hyeok Kim

The difference in the Coefficient of Thermal Expansion (CTE) between the chip and the substrate generate thermal displacement in the solder joint. It seems to be a main cause of failure in the solder joint when the chip and the substrate are heated repeatedly. The failure of the solder joints by thermal fatigue is known to be influenced by varying boundary conditions such as the difference in CTE, the height of solder, the Distance of the solder joint from the Neutral Point (DNP) and the temperature variation. In this paper, the effects of varying boundary conditions on the failure probability of the solder joint are studied by using the probabilistic approach methods such as the First Order Reliability Method (FORM) and the Second Order Reliability Method (SORM).


Author(s):  
Zhengfang Qian ◽  
Xin Wu

This paper presents an approach and its demonstration for seamless tool integration for the virtual qualification and reliability prediction of solder joints of surface mounted electronic components on a populated circuit board. Starting from software called Surface Evolver, it can be used to realistically reproduce complicated geometry profiles of solder joints with various lead frames and pad specifications. User routines have been developed under ANSYS platform for automatic geometry transfer from the Surface Evolver and mesh regeneration of the solder joints inside ANSYS, as demonstrated in this paper. Moreover, a number of electronic packages with their solder joints on a typical printed circuit board (PCB) were also regenerated with parametric capability. Finite element analyses (FEAs) with proper set-up of materials, boundary conditions, and constitutive models were performed automatically by hitting one-button to go. Reliability prediction of solder joints and the failure rate of electronic components can be predicted based on failure criteria and test data implemented. An in-house tool was developed for the whole procedure of solder joint qualification and reliability assessment from deterministic to statistical aspects, including the evaluation of defect impacts.


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