Quality Inspection of Flip Chip Solder Bumps Using Integrated Analytical, Numerical, and Experimental Modal Analyses

2008 ◽  
Vol 130 (3) ◽  
Author(s):  
Jin Yang ◽  
I. Charles Ume
Keyword(s):  
Modal Analysis ◽  
Manufacturing Industry ◽  
Flip Chip ◽  
Solder Bump ◽  
Dynamic Responses ◽  
Mode Shapes ◽  
Inspection System ◽  
Solder Bumps ◽  
Out Of Plane ◽  
Plane Displacement

Solder bump inspection of surface mount packages has been a crucial process in the electronics manufacturing industry. A solder bump inspection system has been developed using laser ultrasound and interferometric techniques. In this research, modal analysis is important to correlate the defects with dynamic responses of packaged electronic devices under pulsed laser loading. The effect of solder bump defects on the mode frequencies and mode shapes is reported in this paper. The objective is to develop a modal analysis approach, which integrates analytical, numerical, and experimental methods. In particular, this paper discusses the analytical modeling, numerical modeling, and transient out-of-plane displacement measurements for a 6.35×6.35×0.6mm3 PB18 flip chip mounted on a FR4 board.

Quality Inspection of Flip Chip Solder Bump Using Analytical, Numerical and Experimental Modal Analyses

2007 ◽  
Author(s):  
Jin Yang ◽  
I. Charles Ume
Keyword(s):  
Modal Analysis ◽  
Manufacturing Industry ◽  
Flip Chip ◽  
Solder Bump ◽  
Electronic Devices ◽  
Dynamic Responses ◽  
Mode Shapes ◽  
Inspection System ◽  
Out Of Plane ◽  
Vibration Experiment

Solder bump inspection of surface mount packages has been a crucial process in the electronics manufacturing industry. A novel solder bump inspection system has been developed using laser ultrasound and interferometric techniques. In this research, modal analysis is important to correlate the defects with dynamic responses of packaged electronic devices. The effect of solder bump defects on the mode frequencies and mode shapes is investigated in this paper. The objective is to develop a modal analysis approach integrating analytical, numerical and experimental methods. In particular, this paper discusses the analytical modeling, numerical modeling, and out-of-plane vibration experiment for a 6.35mm×6.35mm×0.6mm non-underfilled PB18 flip chip on a FR4 board.

Quality Evaluation of Solder Bump in PBGA Package for Commercial Product Application Using Laser Ultrasonic Technique

2013 ◽  
Author(s):  
Jie Gong ◽  
I. Charles Ume ◽  
Kola Akinade ◽  
Amiya Ray Chaudhuri
Keyword(s):  
Solder Bump ◽  
Commercial Product ◽  
Test Results ◽  
Flip Chips ◽  
Solder Bumps ◽  
Plastic Ball ◽  
Out Of Plane ◽  
Ultrasound Inspection ◽  
Plane Displacement

A laser-ultrasound inspection (LUI) system has been successfully applied to detect solder bump defects including missing, misaligned, open, and cracked solder bumps in flip chips, land grid array packages and chip capacitors. This system uses a pulsed laser to induce ultrasound in the chip packages in the thermoelastic regime; it then measures the transient out-of-plane displacement response on the package surface using a laser interferometer. The amplitudes of the out-of-plane displacement are usually in the order of nanometer. The quality of solder bumps is evaluated by analyzing the transient responses. In this paper, this system is used to evaluate quality of solder bumps in plastic ball grid array (PBGA) package on a commercial product. Each chip was divided into 4 quadrants during testing and signal processing. Test results showed that LUI technique is capable of separating good chips from defective chips. Furthermore, LUI technique is able to reveal defect severity at each quadrant for each chip. Finally, chips were cross-sectioned and defects such as open and cracked solder bumps were observed. The cross-section results correlated well with LUI test results. This study demonstrates the feasibility and capability of this system on evaluating the solder bump quality on commercial products.

Modal Analysis of Flip Chip for Solder Bump Defect Detection

2012 ◽  
Vol 468-471 ◽  
pp. 2104-2110
Author(s):  
Jun Chao Liu ◽  
Tie Lin Shi ◽  
Ke Wang ◽  
Miao Zeng ◽  
Guang Lan Liao
Keyword(s):  
Modal Analysis ◽  
Defect Detection ◽  
Flip Chip ◽  
Solder Bump ◽  
Ultrasonic Waves ◽  
Critical Element ◽  
Inspection Method ◽  
Chip Technology ◽  
Solder Bumps ◽  
Resonance Frequencies

Flip chip technology is one of the fastest growing segments of microelectronics packaging because of its ability to satisfy the increasing demands of high input/output density, package miniaturization, and reduced cost. A critical element in the successful application of flip chip technology is the reliability of solder bumps. In this paper, a nondestructive inspection method combining ultrasonic excitation with modal analysis is proposed for flip-chip solder bump defect detection. The signal generator and power amplifier are utilized to drive the capacitive air-coupled ultrasonic transducer to produce continuous ultrasonic waves for exciting the test chips. The vibration velocities of the chips are measured by the laser scanning vibrometer to extract the modal shapes and resonance frequencies. The results prove that the defective chips can be distinguished from the good chip by the modal shapes, and the resonance frequencies of the chips decrease with the increase of the open solder bumps. Therefore, this detection method may provide a new path for the improvement and innovation of flip chip on-line inspection systems.

The Use of Precision Selective Area Milling for Failure Analysis of Flip-Chip Packages

2002 ◽  
Author(s):  
George F. Gaut
Keyword(s):  
Failure Analysis ◽  
Flip Chip ◽  
Solder Bump ◽  
Selective Area ◽  
Fill Material ◽  
Solder Bumps ◽  
Time Required

Abstract Access to the solder bump and under-fill material of flip-chip devices has presented a new problem for failure analysts. The under-fill and solder bumps have also added a new source for failure causes. A new tool has become available that can reduce the time required to analyze this area of a flip-chip package. By using precision selective area milling it is possible to remove material (die or PCB) that will allow other tools to expose the source of the failure.

Defect Detection of Flip Chip Solder Bumps Through Local Temporal Coherence Analysis of Laser Ultrasound Signals

2007 ◽  
Author(s):  
Jin Yang ◽  
Charles Ume
Keyword(s):  
Defect Detection ◽  
Flip Chip ◽  
Solder Bump ◽  
Temporal Coherence ◽  
Coherence Analysis ◽  
Laser Ultrasound ◽  
Surface Mount ◽  
Flip Chips ◽  
Solder Bumps ◽  
Ultrasound Signals

Microelectronics packaging technology has evolved from through-hole and bulk configuration to surface-mount and small-profile ones. In surface mount packaging, such as flip chips, chip scale packages (CSP), and ball grid arrays (BGA), chips/packages are attached to the substrates or printed wiring boards (PWB) using solder bump interconnections. Solder bumps, which are hidden between the device and the substrate/board, are no longer visible for inspection. A novel solder bump inspection system has been developed using laser ultrasound and interferometric techniques. This system has been successfully applied to detect solder bump defects including missing, misaligned, open, and cracked solder bumps in flip chips, and chip scale packages. This system uses a pulsed Nd:YAG laser to induce ultrasound in the thermoelastic regime and the transient out-of-plane displacement response on the device surface is measured using the interferometric technique. In this paper, local temporal coherence (LTC) analysis of laser ultrasound signals is presented and compared to previous signal processing methods, including Error Ratio and Correlation Coefficient. The results show that local temporal coherence analysis increases measurement sensitivity for inspecting solder bumps in packaged electronic devices. Laser ultrasound inspection results are also compared with X-ray and C-mode Scanning Acoustic Microscopy (CSAM) results. In particular, this paper discusses defect detection for a 6.35mm×6.35mm×0.6mm PB18 flip chip and a flip chip (SiMAF) with 24 lead-free solder bumps. These two flip chip specimens are both non-underfilled.

Electromigration Performance of Flip-Chips with Lead-Free Solder Bumps between 30 μm and 60 μm Diameter

2012 ◽  
Vol 2012 (1) ◽  
pp. 000891-000905 ◽  
Author(s):  
Rainer Dohle ◽  
Stefan Härter ◽  
Andreas Wirth ◽  
Jörg Goßler ◽  
Marek Gorywoda ◽  
...  
Keyword(s):  
Flip Chip ◽  
Failure Modes ◽  
Solder Bump ◽  
Void Formation ◽  
Lead Free ◽  
Large Temperature ◽  
Flip Chips ◽  
Solder Bumps ◽  
Current Densities

As the solder bump sizes continuously decrease with scaling of the geometries, current densities within individual solder bumps will increase along with higher operation temperatures of the dies. Since electromigration of flip-chip interconnects is highly affected by these factors and therefore an increasing reliability concern, long-term characterization of new interconnect developments needs to be done regarding the electromigration performance using accelerated life tests. Furthermore, a large temperature gradient exists across the solder interconnects, leading to thermomigration. In this study, a comprehensive overlook of the long-term reliability and analysis of the achieved electromigration performance of flip-chip test specimen will be given, supplemented by an in-depth material science analysis. In addition, the challenges to a better understanding of electromigration and thermomigration in ultra fine-pitch flip-chip solder joints are discussed. For all experiments, specially designed flip-chips with a pitch of 100 μm and solder bump diameters of 30–60 μm have been used [1]. Solder spheres can be made of every lead-free alloy (in our case SAC305) and are placed on a UBM which has been realized for our test chips in an electroless nickel process [2]. For the electromigration tests within this study, multiple combinations of individual current densities and temperatures were adapted to the respective solder sphere diameters. Online measurements over a time period up to 10,000 hours with separate daisy chain connections of each test coupon provide exact lifetime data during the electromigration tests. As failure modes have been identified: UBM consumption at the chip side or depletion of the Nickel layer at the substrate side, interfacial void formation at the cathode contact interface, and - to a much lesser degree - Kirkendall-like void formation at the anode side. A comparison between calculated life time data using Weibull distribution and lognormal distribution will be given.

Detection of Solder Bump Defects in Electronic Packages Using Local Temporal Coherence Analysis of Laser Ultrasonic Signals

2009 ◽  
Vol 131 (1) ◽  
Author(s):  
Jin Yang ◽  
I. Charles Ume
Keyword(s):  
Solder Bump ◽  
Temporal Coherence ◽  
Acoustic Microscopy ◽  
Inspection System ◽  
Laser Ultrasound ◽  
Electronic Packages ◽  
Surface Mount ◽  
Flip Chips ◽  
Solder Bumps ◽  
Ultrasound Inspection

Microelectronics packaging technology has evolved from through-hole and bulk configurations to surface-mount and small-profile configurations. Surface mount devices, such as flip chip packages, chip scale packages, and ball grid arrays, use solder bump interconnections between them and substrates/printed wiring boards. Solder bumps, which are hidden between the device and the substrate/board, are difficult to inspect. A solder bump inspection system was developed using laser ultrasound and interferometric techniques. This system has been successfully applied to detect solder joint/bump defects, including missing, misaligned, open, and cracked solder joints/bumps in flip chips, chip scale packages, and multilayer ceramic capacitors. This system uses a pulsed Nd:YAG laser to induce ultrasound in the electronic packages in the thermoelastic regime; it then measures the transient out-of-plane displacement response on the package surface using the interferometric technique. This paper presents a local temporal coherence (LTC) analysis of laser ultrasound signals and compares it to previous signal-processing methods, including error ratio and correlation coefficient methods. The results showed that LTC analysis increased measurement accuracy and sensitivity for inspecting solder bump defects in electronic packages. Laser ultrasound inspection results are also compared with X-ray and C-mode scanning acoustic microscopy results. In particular, this paper discusses defect detection for 6.35×6.35×0.6 mm3 flip chips and flip chips (“SiMAF;” Siemens AG) with lead-free solder bumps.

Dynamic Analysis of an Elevator Traveling Cable Using a Singularity-Free Beam Formulation

2017 ◽  
Vol 84 (4) ◽  
Author(s):  
W. Fan ◽  
W. D. Zhu
Keyword(s):  
Dynamic Analysis ◽  
Multibody Dynamics ◽  
Natural Frequencies ◽  
Vertical Motion ◽  
Dynamic Responses ◽  
Mode Shapes ◽  
Out Of Plane ◽  
Forced Responses ◽  
Free Beam ◽  
Good Agreement

A round elevator traveling cable is modeled using a singularity-free beam formulation. Equilibria of the traveling cable with different elevator car positions are studied. Natural frequencies and the corresponding mode shapes of the traveling cable are calculated and they are in excellent agreement with those calculated by abaqus. In-plane natural frequencies of the traveling cable do not change much with the car position compared with its out-of-plane ones. Dynamic responses of the traveling cable are calculated and they are in good agreement with those from commercial multibody dynamics software recurdyn. Effects of vertical motion of the car on free responses of the traveling cable and those of in-plane and out-of-plane building sways on forced responses are investigated.

A Theoretical Analysis of the Concept of Critical Clearance Toward a Design Methodology for the Flip-Chip Package

2007 ◽  
Vol 129 (4) ◽  
pp. 473-478 ◽  
Author(s):  
J. W. Wan ◽  
W. J. Zhang ◽  
D. J. Bergstrom
Keyword(s):  
Flip Chip ◽  
Solder Bump ◽  
Flow Characteristics ◽  
Quantitative Relation ◽  
Package Design ◽  
Solder Bumps ◽  
Filling Time ◽  
Encapsulation Process ◽  
Advanced Packaging ◽  
Gap Height

In this article, we present a theoretical study on the concept known as critical clearance for flip-chip packages. The critical clearance phenomenon was first observed in an experiment reported by Gordon et al. (1999, “A Capillary-Driven Underfill Encapsulation Process,” Advanced Packaging, 8(4), pp. 34–37). When the clearance is below a critical value, filling time begins to increase dramatically, and when the clearance is above this value, the influence of clearance on filling time is insignificant. Therefore, the optimal solder bump density in a flip-chip package should be one with a clearance larger than the critical clearance. The contribution of our study is the development of a quantitative relation among package design features, flow characteristics, and critical clearance based on an analytical model we developed and reported elsewhere. This relation is further used to determine critical clearance given a type of underfill material (specifically the index n of the power-law constitutive equation), the solder bump pitch, and the gap height; further the flip-chip package design can be optimized to make the actual clearance between solder bumps greater than its corresponding critical clearance.

scholarly journals Experimental Measurement of Mode Shapes and Frequencies for Vibration of Plates by Optical Interferometry Method

2000 ◽  
Vol 123 (2) ◽  
pp. 276-280 ◽  
Author(s):  
Chi-Hung Huang ◽  
Chien-Ching Ma
Keyword(s):  
Video Recording ◽  
Field Configuration ◽  
Mode Shapes ◽  
Resonant Frequencies ◽  
Full Field ◽  
Out Of Plane ◽  
Vibrating Plates ◽  
Optical Reconstruction ◽  
Fringe Patterns ◽  
Plane Displacement

Most of the published literature for vibration mode shapes of plates is concerned with analytical and numerical results. There are only very few experimental results available for the full field configuration of mode shapes for vibrating plates. In this study, an optical system called the AF-ESPI method with the out-of-plane displacement measurement is employed to investigate experimentally the vibration behavior of square isotropic plates with different boundary conditions. The edges of the plates may either be clamped or free. As compared with the film recording and optical reconstruction procedures used for holographic interferometry, the interferometric fringes of AF-ESPI are produced instantly by a video recording system. Based on the fact that clear fringe patterns will appear only at resonant frequencies, both resonant frequencies and corresponding mode shapes can be obtained experimentally at the same time by the proposed AF-ESPI method. Excellent quality of the interferometric fringe patterns for the mode shapes is demonstrated.

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