A Highly Accelerated Thermal Cycling (HATC) Test for Solder Reliability Assessment in BGA Packages

A thermo-mechanical loading system, which can superimpose a temperature and location dependent strain on solder joints, is proposed in order to conduct highly accelerated thermal-mechanical cycling (HATC) tests to assess thermal fatigue reliability of Ball Grid Array (BGA) solder joints in microelectronics packages. The application of this temperature and position dependent strain produces generally similar loading modes (shear and tension) encountered by BGA solder joints during service, but substantially enhances the inelastic strain accumulated during thermal cycling over the same temperature range as conventional ATC (accelerated thermal cycling) tests, thereby leading to a substantial acceleration of low-cycle fatigue damage. Finite element analysis was conducted to aid the design of experimental apparatus and to predict the fatigue life of solder joints in HATC testing. Detailed analysis of the loading locations required to produce failure at the appropriate joint (next to the die-edge ball) under the appropriate tension/shear stress partition are presented. The simulations showed that the proposed HATC test constitutes a valid methodology for further accelerating conventional ATC tests. An experimental apparatus, capable of applying the requisite loads to a BGA package was constructed, and experiments were conducted under both HATC and ATC conditions. It is shown that HATC proffers much reduced cycling times compared to ATC.

Characterization of Light Weight Heat Sink Materials for Thermal Management of Electronics

Thermal management of electronics is a critical part of maintaining high efficiency and reliability. Adequate cooling must be balanced with weight and volumetric requirements, especially for passive air-cooling solutions in electronics applications where space and weight are at a premium. It should be noted that there are systems where thermal solution takes more than 95% of the total weight of the system. Therefore, it is necessary to investigate and utilize advanced materials to design low weight and compact systems. Many of the advanced materials have anisotropic thermal properties and their performances depend strongly on taking advantage of superior properties in the desired directions. Therefore, control of thermal conductivity plays an important role in utilization of such materials for cooling applications. Because of the complexity introduced by anisotropic properties, thermal performances of advanced materials are yet to be fully understood. Present study is an experimental and computational study on characterization of thermal performances of advanced materials for heat sink applications. Numerical simulations and experiments are performed to characterize thermal performances of four different materials. An estimated weight savings in excess of 75% with lightweight materials are observed compared to the traditionally used heat sinks.

Assessment of 20 Micrometer Diameter Wires for Wire Bond Interconnect Technology

In the domain of wire bonding technology, the size and pitch of bond pads and ball bonds are shrinking to accommodate the demand for higher I/Os and increased functionality per chip area. This trend serves as a catalyst for bonding wire manufacturers to continuously develop lower diameter bonding wires. One mil (25 μm) diameter bonding wire, used widely in this interconnection technique, is now being replaced by 0.8 mil (20 μm) diameter bonding wire. In keeping with the need for higher operating speeds and higher temperatures for today’s ICs, the reliability of ball bonds formed by small diameter wires is of concern and requires investigation. This study explores the effects of 0.8 mil (20 μm) diameter bonding wire on the wire bond ball joint reliability and compares these effects with 1.0 mil (25 μm) diameter bonding wire. The reliability of the ball bonds was assessed using mechanical tests (wire pull and ball shear) for units subjected to stress tests such as the unbiased highly accelerated stress test and high temperature storage tests. The results of this investigation reveal that both the wire diameters are able to sustain their integrity after moisture testing. But, the bond strength degrades after high temperature tests due to the Kirkendall voiding mechanism occurring between gold wire and the aluminum bond pad.

Chip-on-Beam and Hydrostatic Calibration of the Piezoresistive Coefficients on (111) Silicon

Stress sensing test chips are used to investigate die stresses arising from assembly and packaging operations. The chips incorporate resistor or transistor sensing elements that are able to measure stresses via the observation of the changes in their resistivity/mobility. The piezoresistive behavior of such sensors is characterized by three piezoresistive (pi) coefficients, which are electro-mechanical material constants. Stress sensors fabricated on the surface of the (111) silicon wafers offer the advantage of being able to measure the complete stress state compared to such sensors fabricated on the (100) silicon. However, complete calibration of the three independent piezoresistive coefficients is more difficult and one approach utilizes hydrostatic measurement of the silicon “pressure” coefficients. We are interested in stress measurements over a very broad range of temperatures, and this paper present the experimental methods and results for hydrostatic measurements of the pressure coefficient of both n- and p-type silicon over a wide range of temperatures and then uses the results to provide a complete set of temperature dependent piezoresisitive coefficients for the (111) silicon.

Quantitative Characterization of Microsystem Dynamics

Development of microelectromechanical system (MEMS) sensors for various applications requires the use of analytical and computational modeling/simulation coupled with rigorous physical measurements. This requirement has led to advancement of an approach that combines computer aided design (CAD) and multiphysics modeling/simulation tools with the state-of-the-art (SOTA) measurement methodology to facilitate reduction of high prototyping costs, long product development cycles, and time-to-market pressures while devising MEMS for a variety of applications. In this approach, a unique, fully integrated software environment for multiscale, multiphysics, high fidelity modeling of MEMS is combined with the optoelectronic laser interferometric microscope methodology for quantitative measurements. The optoelectronic methodology allows remote, noninvasive full-field-of view (FFV) measurements of deformations/motions (under operating conditions) with high spatial resolution, nanometer accuracy, and in near real-time. In this paper, both, the modeling environment (including an analytical process used to quantitatively show the influence that various parameters defining a sensor have on its dynamics — using this process dynamic characteristics of a sensor can be optimized by constraining its nominal dimensions and finding the optimum set of uncertainties in these dimensions that best satisfy design requirements/specifications) and the optoelectronic methodology are described and their applications are illustrated with representative examples demonstrating viability of the approach, combining modeling and measurements, for quantitative characterization of microsystem dynamics. These representative examples demonstrate capability of the approach described herein to quantitatively determine effects of dynamic loads on performance of selected MEMS.

Thermal Management in RF MEMS Ohmic Switches

Today, an ideal microelectromechanical systems (MEMS) switch is no longer a designer’s dream, yet electrothermomechanical (ETM) effects still limit the design possibilities and may adversely affect reliability of microswitches, especially the Ohmic-type cantilever contact switches. The ETM effects are a result of Joule heat generated at the switch contact areas (i.e., electrical interfaces). This heat is due to an electrical signal passing through a microswitch, internal resistance of contact materials, and characteristics of the electrical contact interface. It significantly raises temperature of a microswitch, thus adversely affecting mechanical and electrical properties of the contacts, leading to their wear or even welding, which is a major reliability issue. Fundamental research is being performed to minimize Joule heat effects in the electrical interface area, thus improving the microswitch performance and reliability. Thermal analysis conducted computationally on an Ohmic-type RF MEMS switch indicate heat affected zones (HAZ) and the influence that various parameters have on those zones. Such analysis facilitates mitigation of thermal management issues that may otherwise be detrimental to functional operation of a microswitch.

Pb-Free Process Development for a High End Storage Area Network Application

Lead free solders are being increasingly used in the electronic industry. While most of the electronic products, in terms of volume, are already built lead free, sectors of the industry including high end servers, networking and telecommunications are covered by “lead in solder” exemptions. It is unknown at this point how long these exemptions will last. In addition, many components such as memories have started appearing only in the Pb-free version. As a result, the industry has been pushed to either adopt a mixed assembly process or to transition early to a full Pb-free process. Even though numerous papers have outlined the successful implementation of a Pb-free process, few of them have actually looked at complex high-end multilayer boards in its entirety. This paper focuses on the issues involved in developing an acceptable Pb-free process window for thick, multilayer boards for SMT, Wave soldering, Rework and Press-fit operations. A laminate capable of withstanding Pb-free soldering temperatures was used to construct a 125-mil thick multilayer board with 18 layers which included 8 ground and 10 signal planes. This experiment utilized two popular Pb-free finishes commonly used in the industry: Immersion Silver and high temperature Organic Solderability Preservative (OSP). The widespread SAC 305 alloy with a composition of Sn3.0Ag0.5Cu was used for both SMT and wave soldering. Three sets of assemblies were built: Pb-free, Mixed and Sn/Pb. The mixed assembly mostly used Pb-free components with Sn/Pb solder paste. The impact of increased soldering temperatures on the board, components and reliability of the product were also studied as a part of this research endeavor. Board level reliability tests were conducted by subjecting the boards from 0°C to 100°C Air-to-Air thermal cycling as well as mechanical shock and vibration tests. A suite of reliability and destructive physical analysis (DPA) tests were carried out to establish the quality of the soldering using the eutectic Sn/Pb assembly as the baseline. The study compared the cycling performance of the three sets of assemblies and also looked at the potential impacts of moving to mixed assemblies. Results indicated a reduced process window for Pb-free, especially for the Pb-free wave soldering process due to reduced wetting of the plated through hole barrels as compared to Sn/Pb wave soldering process. The thermal cycling performance of the three sets of assemblies was found to be equivalent after 6000 cycles.

Application of Exploratory Data Analysis (EDA) Techniques to Temperature Data in a Conventional Data Center

Data centers are the computational hub of the next generation. Rise in demand for computing has driven the emergence of high density datacenters. With the advent of high density, mission-critical datacenters, demand for electrical power for compute and cooling has grown. Deployment of a large number of high powered computer systems in very dense configurations in racks within data centers will result in very high power densities at room level. Hosting business and mission-critical applications also demand a high degree of reliability and flexibility. Managing such high power levels in the data center with cost effective reliable cooling solutions is essential to feasibility of pervasive compute infrastructure. Energy consumption of data centers can also be severely increased by over-designed air handling systems and rack layouts that allow the hot and cold air streams to mix. Absence of rack level temperature monitoring has contributed to lack of knowledge of air flow patterns and thermal management issues in conventional data centers. In this paper, we present results from exploratory data analysis (EDA) of rack-level temperature data collected over a period of several months from a conventional production datacenter. Typical datacenters experience surges in power consumption due to rise and fall in compute demand. These surges can be long term, short term or periodic, leading to associated thermal management challenges. Some variations may also be machine-dependent and vary across the datacenter. Yet other thermal perturbations may be localized and momentary. Random variations due to sensor response and calibration, if not identified, may lead to erroneous conclusions and expensive faults. Among other indicators, EDA techniques also reveal relationships among sensors and deployed hardware in space and time. Identification of such patterns can provide significant insight into data center dynamics for future forecasting purposes. Knowledge of such metrics enables energy-efficient thermal management by helping to create strategies for normal operation and disaster recovery for use with techniques like dynamic smart cooling.

CMOS Compatible Wafer-Scale Encapsulation MEMS Resonators

A unique MEMS encapsulation process on the use of epipolysilicon as a packaging and sealing layer is demonstrated. This process provides a very clean and stable environment for MEMS, is compatible with CMOS integration, and can be carried out in a conventional CMOS facility with standard tools. Silicon resonators fabricated inside the ‘epi-seal’ encapsulation showed quality factors over 10,000 and commercial level long-term stability (ppm level drift for over 1 year of operation). In addition, several modifications and improvements, such as Si-SiO2 composite resonators for reduced temperature coefficient of frequency and thermal isolated anchors for direct temperature control were successfully added to this process for improvements in resonator stability over temperature.

Experimental Investigation on Thermal Performance of Heat Sink With Two Pairs of Embedded Heat Pipes

This article provides an experimental method to study the thermal performance of a heat sink with two pairs (outer and inner pair) of embedded heat pipes. The proposed method can determine the heat transfer rate of the heat pipes under various heating power of the heat source. A comprehensive thermal resistance network of the heat sink is also developed. The network estimates the thermal resistances of the heat sink by applying the thermal performance test result. The results show that the outer and inner pairs of heat pipes carries 21% and 27% of the total heat transfer rate respectively, while 52% of the heating power is dissipated from the base plate to the fins. The dominated thermal resistance of the heat sink is the base to heat pipes resistance which is strongly affected by the thermal performance of the heat pipes. The total thermal resistance of the heat sink shows the lowest value, 0.23°C/W, while the total heat transfer rate of the heat sink is 140W and the heat transfer rate of the outer and inner pairs of heat pipes is 30W and 38 W, respectively.