Correlation of Warpage Distribution With the Material Property Scattering for Warpage Range Prediction of PBGA Components

2018 ◽  
Vol 140 (4) ◽  
Author(s):  
Qiming Zhang ◽  
Jeffery C. C. Lo ◽  
S. W. Ricky Lee ◽  
Wei Xu
Keyword(s):  
Material Property ◽  
Material Properties ◽  
Printed Circuit Boards ◽  
Coefficient Of Thermal Expansion ◽  
Academic Research ◽  
Sensitivity Study ◽  
Industrial Applications ◽  
Surface Mount Technology ◽  
Surface Mount ◽  
Distribution Ranges

In recent years, due to the increased size of ball grid array (BGA) devices, the assembly of BGAs on printed circuit boards through surface mount technology has encountered unprecedented challenges from thermal warpage. The excessive warpage of BGAs in the reflow process may cause manufacture problems and even the risk of failure. Thus, it is essential to acquire warpage values and corresponding distribution ranges of BGAs before the surface mount technology process. In order to avoid assembly failure, theoretically, it is necessary to guarantee that all BGA devices meet the acceptance requirement of relevant standards. Generally, a large number of samples should be measured to obtain a relatively reliable warpage data distribution in the reflow temperature range, which makes this test quite costly and extremely time consuming. This study proposes another method to estimate the BGA warpage value and its possible corresponding range from the material property point of view. Because the mechanism of BGA warpage is related to the coefficient of thermal expansion (CTE) mismatch between the different materials, the warpage data scattering can be correlated with the scattering of material properties through finite element method (FEM) analysis. With a known mean value and range of material properties, the warpage value and corresponding distribution range can be solved. A sensitivity study is also presented in this paper. The accuracy of the proposed method is evaluated and the corresponding warpage data fluctuation range is estimated. From the comparison of the simulation and experiment results, determining the material properties could lead to a reasonable prediction of warpage in both the qualitative and quantitative sense. The proposed methodology for BGA warpage estimation can be used for academic research and industrial applications.

scholarly journals A V-Shape Optical Pin Interface for Board Level Optical Interconnect

2018 ◽  
Vol 10 (1) ◽  
pp. 20
Author(s):  
Nur Najahatul Huda Saris ◽  
Osamu Mikami ◽  
Azura Hamzah ◽  
Sumiaty Ambran ◽  
Chiemi Fujikawa
Keyword(s):  
Optical Networks ◽  
Optical Interconnects ◽  
Printed Circuit Boards ◽  
Data Centers ◽  
Low Cost ◽  
Optical Interconnection ◽  
Surface Mount Technology ◽  
Optical Surface ◽  
Printed Wiring Board ◽  
Surface Mount

This paper introduces a new interface of an optical pin for Printed Circuit Boards (PCBs), the V-shape cut type which is an innovation from the 90-degree cut type optical pin. The effectiveness is determined by optical characteristics through OptiCAD and by experiment. The simulation used a model of ray tracing analysis which is a one to two (split) connection function model. For the experiment, a Polymer Optical Fibre (POF) V-shape optical pin has been fabricated. It was found that the V-shaped optical pin has a multi-branched function and is applicable to optical interconnection. Full Text: PDF ReferencesMikami, O., et al. Optical pin interface for 90-deg optical path conversion coupling to Printed Wiring Board. in Region 10 Conference (TENCON), 2016 IEEE. 2016. IEEE. CrossRef DeCusatis, C., Data center architectures, in Optical Interconnects for Data Centers. 2017, Elsevier. p. 3-41. CrossRef Duranton, M., D. Dutoit, and S. Menezo, Key requirements for optical interconnects within data centers, in Optical Interconnects for Data Centers. 2017, Elsevier. p. 75-94. CrossRef ITOH, Y., et al., Optical Coupling Characteristics of Optical Pin with 45° Micro Mirror for Optical Surface Mount Technology. Journal of The Japan Institute of Electronics Packaging, 2001. 4(6): p. 497-503. CrossRef Uchida, T. and O. Mikami, Optical surface mount technology. IEICE Transactions on Electronics, 1997. 80(1): p. 81-87. CrossRef Papakonstantinou, I., et al., Low-cost, precision, self-alignment technique for coupling laser and photodiode arrays to polymer waveguide arrays on multilayer PCBs. IEEE Transactions on Advanced Packaging, 2008. 31(3): p. 502-511. CrossRef Nakama, K., et al., Optical connection device. 2006, Google Patents. DirectLink Ramaswami, R., K. Sivarajan, and G. Sasaki, Optical networks: a practical perspective. 2009: Morgan Kaufmann. DirectLink Tong, X.C., Advanced materials for integrated optical waveguides. 2014: Springer. CrossRef

A Novel Placement Method for Mini-Scale Passive Components in Surface Mount Technology

2021 ◽  
Author(s):  
Jingxi He ◽  
Yuqiao Cen ◽  
Yuanyuan Li ◽  
Shrouq Alelaumi ◽  
Daehan Won
Keyword(s):  
Printed Circuit Boards ◽  
Low Cost ◽  
Superior Performance ◽  
Surface Mount Technology ◽  
Solder Paste ◽  
Passive Components ◽  
Surface Mount ◽  
Placement Method ◽  
Pick And Place ◽  
Comparative Results

Abstract This paper aims to propose a novel placing method, i.e., place-between-paste-and-pad (PB), for mini-scale passive components to enhance electronic assembly lines' yield. PB means a component is designed to be placed at the midpoint between the pastes and pads on the length direction while it aligns with the pads' center on the width direction. An experiment that involves 12 printed circuit boards (PCB) is designed and conducted to get comparative results. Four PCBs are employed for place-on-pad (PP), place-on-paste (PPS), and PB separately. On each board, 375 resistors R0402M (0.40 mm X 0.20 mm) are assembled horizontally. To study the components' misalignment under various solder paste offset conditions in different placement methods, a stencil with 25 solder paste offset settings is utilized. Based on this experiment's results, PB has superior performance to the other two methods to minimize components' misalignment. Regarding the number of acceptable components when post-reflow offsets are within 25% of components' dimensions, PB and PP have equivalent performances, and they both outperform PPS. Furthermore, PB is a low-cost placing strategy because PB needs not the real-time communication between the solder paste inspection machine and the pick-and-place machine. With the miniaturization trend in electronic products, the post-reflow components' misalignment is more frequently observed than before. The placement method proposed in this study is expected to offer a low-cost exploration in the component pick-and-place procedure to enhance the surface mount technology (SMT) assembly quality.

Investigation of Transfer Mold Process Effects on Semiconductor Package Warpage

2009 ◽  
Author(s):  
Jason M. Brand ◽  
Myung J. Yim ◽  
Ravi Kumar
Keyword(s):  
Solder Joint ◽  
Material Property ◽  
Material Properties ◽  
Coefficient Of Thermal Expansion ◽  
Filler Concentration ◽  
Packaging System ◽  
Property Variation ◽  
Molding Compound ◽  
Fea Model ◽  
Die Attach

In recent years, Package on Package (PoP) is increasingly used for high density package solutions. Generally the top package is a stacked memory packaging system connected to a bottom logic packaging system via solder joint: this is representative of PoP configurations. To guarantee the assembly yield and reliability of the solder joint between the top package and bottom package, mechanical compliance between these two packages is crucial during package stacking. Henceforth package warpage needs to be understood and controlled to meet the assembly yield targets. The complexity of the package configuration increases by thinner package thickness, higher number of stacking dies and large package size. Controlling the warpage within the target requirement is very challenging, especially when the material behaviors of substrate, die, molding compound and die attach film are different and also changing as a function of temperature. Certainly, the material properties of key components in top PoP package plays a crucial role in warpage performance. Among various material properties, the chemical cure shrinkage, coefficient of thermal expansion and storage modulus for the molding compounds are determining factors on the temperature dependant warpage control of top PoP package. Warpage variation still exists within parts processed at the same time mainly due to slight material property variation. In this paper, the cause of the warpage variation is investigated. The main cause was found to be filler migration effect in narrow gaps with in the stacked die package during the mold process, which resulted in different filler concentration and distribution, and finally different local molding compound material property among the package unit location in the substrate strip. The findings indicate that mold pressure is not a major modulator of warpage, while filler distribution can dramatically alter the warpage behavior. FEA model results and warpage data are presented to validate the filler migration phenomena and warpage behavior impact. The findings and results provide some clues and design/process guideline for warpage control in Top PoP package, which influence the PoP assembly yield and reliability.

PCB Related Failures in Electronic Assemblies

2011 ◽  
Vol 341-342 ◽  
pp. 411-415
Author(s):  
Ping Liu ◽  
Xiao Long Gu ◽  
Xin Bing Zhao ◽  
Xiao Gang Liu
Keyword(s):  
Printed Circuit Boards ◽  
Surface Mount Technology ◽  
Circuit Boards ◽  
Surface Mount ◽  
Printed Circuit ◽  
Process Procedures ◽  
Manufacture Process ◽  
Black Pad ◽  
Conductive Anodic Filament ◽  
Electronic Assemblies

The complexity of Printed Circuit Boards (PCBs) has increased dramatically over the last three decades with the development of surface mount technology (SMT). The typical manufacture of rigid multilayer PCB contains many process procedures, which makes manufacture and application much more challenges. This paper focuses on some typical PCB related failures. Recommendations are provided on optimizing PCB manufacture process and material application. Microvia crack, black pad, galvanic attack, pad design, conductive anodic filament and pad crater are presented in detail.

A study of the strength and shape of surface mount technology leadless chip solder joints

1997 ◽  
Vol 211 (1) ◽  
pp. 29-41 ◽  
Author(s):  
I. K. Hui ◽  
B Ralph
Keyword(s):  
Printed Circuit Boards ◽  
Failure Modes ◽  
Solder Joints ◽  
Circuit Board ◽  
Surface Mount Technology ◽  
Surface Mount ◽  
Printed Circuit ◽  
Wave Soldering ◽  
Infra Red

A method that directly pulled the components off printed circuit boards was used as a means for testing the bond quality of surface mount technology leadless chip solder joints. Components D7243, CC1206, RC1206, RC1210 and CC1812 were selected for the study. It was found that the ultimate tensile force that breaks a component off the printed circuit board has the potential to be used as a parameter for measuring the quality of the solder joint. The failure modes of the joints were recorded and are discussed. The effect of solder thickness on the strength of a joint has also been investigated. The shape of joints soldered by two methods, wave soldering and infra-red reflow, were compared. Joints at the two ends of a component produced by infra-red reflow were found to be more uniform than the ones produced by wave soldering. A recommendation is made here for the wave soldering approach in achieving uniform solder joints. The effects of solder shape on the joint strength were further investigated by finite element analysis. A convex joint was found to be marginally more robust than a concave joint.

Assessment of Factors Influencing Finite Element Vertebral Model Predictions

2007 ◽  
Vol 129 (6) ◽  
pp. 898-903 ◽  
Author(s):  
Alison C. Jones ◽  
Ruth K. Wilcox
Keyword(s):  
Finite Element ◽  
Boundary Conditions ◽  
Material Property ◽  
Material Properties ◽  
Property Values ◽  
Sensitivity Study ◽  
Element Analysis ◽  
Homogeneous Models ◽  
Specific Material ◽  
Similar Accuracy

This study aimed to establish model construction and configuration procedures for future vertebral finite element analysis by studying convergence, sensitivity, and accuracy behaviors of semiautomatically generated models and comparing the results with manually generated models. During a previous study, six porcine vertebral bodies were imaged using a microcomputed tomography scanner and tested in axial compression to establish their stiffness and failure strength. Finite element models were built using a manual meshing method. In this study, the experimental agreement of those models was compared with that of semiautomatically generated models of the same six vertebrae. Both manually and semiautomatically generated models were assigned gray-scale-based, element-specific material properties. The convergence of the semiautomatically generated models was analyzed for the complete models along with material property and architecture control cases. A sensitivity study was also undertaken to test the reaction of the models to changes in material property values, architecture, and boundary conditions. In control cases, the element-specific material properties reduce the convergence of the models in comparison to homogeneous models. However, the full vertebral models showed strong convergence characteristics. The sensitivity study revealed a significant reaction to changes in architecture, boundary conditions, and load position, while the sensitivity to changes in material property values was proportional. The semiautomatically generated models produced stiffness and strength predictions of similar accuracy to the manually generated models with much shorter image segmentation and meshing times. Semiautomatic methods can provide a more rapid alternative to manual mesh generation techniques and produce vertebral models of similar accuracy. The representation of the boundary conditions, load position, and surrounding environment is crucial to the accurate prediction of the vertebral response. At present, an element size of 2×2×2mm3 appears sufficient since the error at this size is dominated by factors, such as the load position, which will not be improved by increasing the mesh resolution. Higher resolution meshes may be appropriate in the future as models are made more sophisticated and computational processing time is reduced.

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