Temperature dependence of the electrical characteristics of ZnO thin film transistor with high-k NbLaO gate dielectric

Author(s):  
Hong-cheng Li ◽  
Yu-rong Liu ◽  
Kui-wei Geng ◽  
Wei-jing Wu ◽  
Ruo-he Yao ◽  
...  
2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Chao-Te Liu ◽  
Wen-Hsi Lee ◽  
Jui-Feng Su

The nanocomposite gate insulating film of a pentacene-based thin film transistor was deposited by inkjet printing. In this study, utilizing the pearl miller to crumble the agglomerations and the dispersant to well stabilize the dispersion of nano-TiO2particles in the polymer matrix of the ink increases the dose concentration for pico-jetting, which could be as the gate dielectric film made by inkjet printing without the photography process. Finally, we realized top contact pentacene-TFTs and successfully accomplished the purpose of directly patternability and increase the performance of the device based on the nanocomposite by inkjet printing. These devices exhibited p-channel TFT characteristics with a high field-effect mobility (a saturation mobility of ̃0.58 cm2 V−1 s−1), a large current ratio (>103) and a low operation voltage (<6 V). Furthermore, we accorded the deposited mechanisms which caused the interface difference between of inkjet printing and spin coating. And we used XRD, SEM, Raman spectroscopy to help us analyze the transfer characteristics of pentacene films and the performance of OTFTs.


2013 ◽  
Vol 138 (1) ◽  
pp. 1-4 ◽  
Author(s):  
Sungho Choi ◽  
Byung-Yoon Park ◽  
Sunho Jeong ◽  
Ji-Yoon Lee ◽  
Beyong-Hwan Ryu ◽  
...  

2016 ◽  
Vol 56 ◽  
pp. 29-33 ◽  
Author(s):  
M. Estrada ◽  
M. Rivas ◽  
I. Garduño ◽  
F. Avila-Herrera ◽  
A. Cerdeira ◽  
...  

2019 ◽  
Vol 13 (1) ◽  
pp. 151-155
Author(s):  
Tung-Ming Pan ◽  
Tin-Wei Wu ◽  
Ching-Lin Chan ◽  
Kai-Ming Chen ◽  
Chih-Hong Lee

Polymers ◽  
2021 ◽  
Vol 13 (22) ◽  
pp. 3941
Author(s):  
Ching-Lin Fan ◽  
Hou-Yen Tsao ◽  
Yu-Shien Shiah ◽  
Che-Wei Yao ◽  
Po-Wei Cheng

In this study, we proposed using the high-K polyvinyl alcohol (PVA)/low-K poly-4-vinylphenol (PVP) bilayer structure as the gate insulator to improve the performance of a pentacene-based organic thin-film transistor. The dielectric constant of the optimal high-K PVA/low-K PVP bilayer was 5.6, which was higher than that of the single PVP layer. It resulted in an increase in the gate capacitance and an increased drain current. The surface morphology of the bilayer gate dielectric could be suitable for pentacene grain growth because the PVP layer was deposited above the organic PVA surface, thereby replacing the inorganic surface of the ITO gate electrode. The device performances were significantly improved by using the bilayer gate dielectric based upon the high-K characteristics of the PVA layer and the enlargement of the pentacene grain. Notably, the field-effect mobility was increased from 0.16 to 1.12 cm2/(Vs), 7 times higher than that of the control sample.


Author(s):  
Youssef Ahmed Mobarak ◽  
Moamen Atef

<span>The potential impact of high permittivity gate dielectrics on thin film transistors short channel and circuit performance has been studied using <a name="OLE_LINK110"></a><a name="OLE_LINK118"></a>highly accurate analytical models. In addition, the gate-to-channel capacitance and parasitic fringe capacitances have been extracted. The suggested model in this paper has been <a name="OLE_LINK37"></a><a name="OLE_LINK36"></a>increased the surface potential and decreased the <a name="OLE_LINK93"></a><a name="OLE_LINK92"></a>threshold voltage, whenever the conventional silicon dioxide gate dielectric<a name="OLE_LINK290"></a><a name="OLE_LINK280"></a> is replaced by high-K gate dielectric novel nanocomposite PVP/La<sub>2</sub>O<sub>3</sub>K<sub>ox</sub>=25. Also, it has been investigated that a decrease in parasitic outer fringe capacitance and gate-to-channel capacitance, whenever the conventional silicon nitride is replaced by low-K gate sidewall spacer dielectric novel nanocomposite PTFE/SiO<sub>2</sub>K<sub>sp</sub>=2.9. Finally, it has been demonstrated that using low-K gate sidewalls with high-K gate insulators can be decreased the gate fringing field and threshold voltage. In addition, fabrication of nanocomposites from polymers and nano-oxide particles found to have potential candidates for using it in a wide range of applications in low cost due to low process temperature of these nanocomposites materials.</span>


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