ON THE PERFORMANCE AND COST OF SOME PRAM MODELS ON CMP HARDWARE

2010 ◽  
Vol 21 (03) ◽  
pp. 387-404 ◽  
Author(s):  
MARTTI FORSELL
Keyword(s):  
Random Access ◽  
Chip Multiprocessor ◽  
Pram Model ◽  
Vlsi Technology ◽  
Cost Efficient ◽  
Performance Area ◽  
And Performance ◽  
On Chip ◽  
Parallel Random Access Machine ◽  
The Cost

The Parallel Random Access Machine is a very strong model of parallel computing that has resisted cost-efficient implementation attempts for decades. Recently, the development of VLSI technology has provided means for indirect on-chip implementation, but there are different variants of the PRAM model that provide different performance, area and power figures and it is not known how their implementations compare to each others. In this paper we measure the performance and estimate the cost of practical implementations of four PRAM models including EREW, Limited Arbitrary CRCW, Full Arbitrary CRCW, Full Arbitrary Multioperation CRCW on our Eclipse chip multiprocessor framework. Interestingly, the most powerful model shows the lowest simulation cost and highest performance/area and performance/power figures.

A PRACTICAL PLATFORM FOR CREW EMULATION

1993 ◽  
Vol 03 (02) ◽  
pp. 139-145 ◽  
Author(s):  
PETER J. LOOGES ◽  
STEPHAN OLARIU
Keyword(s):  
Lower Bounds ◽  
Random Access ◽  
Technology Support ◽  
Development Tool ◽  
Pram Model ◽  
Vlsi Technology ◽  
Crew Pram ◽  
Cmos Vlsi ◽  
Parallel Random Access Machine ◽  
Crossbar Network

The Parallel Random Access Machine or PRAM model, has been a much employed parallel algorithm development tool for a number of years. As such, many important problems have been solved on this model. Accordingly, considerable attention has been given to the process of simulating PRAM models on more realistic architectures. The purpose of this paper is to present an efficient simulation of the Concurrent Read Exclusive Write PRAM model by the crossbar connected machine (CCM). In addition to simulation, it is proven that all lower bounds for the CREW PRAM directly apply to the CCM. This is the first presentation of algorithmic lower bounds for a crossbar based model. The buses of the network are assumed to have a broadcast delay of δ(n). Recent implementations of the crossbar network in CMOS VLSI technology support the viability of the CCM model. It is the communication flexibility of the crossbar network which supports the PRAM simulations in a very straightforward manner without the complex interconnection systems or high overhead algorithms of many prior simulations.

PARALLEL ALGORITHMS FOR SOME DOMINANCE PROBLEMS BASED ON THE PRAM MODEL

1993 ◽  
Vol 03 (04) ◽  
pp. 367-382
Author(s):  
I.W. CHAN ◽  
D.K. FRIESEN
Keyword(s):  
Computational Model ◽  
Single Point ◽  
Random Access ◽  
Geometric Algorithms ◽  
Counting Problem ◽  
Erew Pram ◽  
Pram Model ◽  
Input Size ◽  
Parallel Random Access Machine ◽  
Direct Dominance

Two parallel geometric algorithms based on the idea of point domination are presented. The first algorithm solves the d-dimensional isothetic rectangles intersection counting problem of input size N/2d, where d>1 and N is a multiple of 2d, in O( log d−1 N) time and O(N log N) space. The second algorithm solves the direct dominance reporting problem for a set of N points in the plane in O( log N+J) time and O(N log N) space, where J denotes the maximum of the number of direct dominances reported by any single point in the set. Both algorithms make use of the EREW PRAM (Exclusive Read Exclusive Write Parallel Random Access Machine) consisting of O(N) processors as the computational model.

scholarly journals Maximizing Throughput of The GEO Satellite At C/Ku Bands

2021 ◽  
Author(s):  
Sabir Hussain ◽  
Ghulam Jaffer
Keyword(s):  
Rural Areas ◽  
High Performance ◽  
Satellite System ◽  
Data Traffic ◽  
Coverage Area ◽  
Geo Satellite ◽  
Cost Efficient ◽  
And Performance ◽  
The Cost ◽  
Ku Band

Abstract The need for broadband data has increased speedily but in underserved rural areas, the mobile connectivity of 3G and LTE is still a significant challenge. By looking at the historical trend, the data traffic and the internet are still expected to grow in these areas [1]. The next generation of satellites is trying to decrease the cost per MB having the advantage of higher throughput and availability. To maintain the performance of the link, choosing an appropriate frequency is evident. A multi-beam satellite system can fulfill the demand and performance over a coverage area. The high throughput satellites (HTS) fulfill this requirement using C and Ku bands. In this paper, we present the benefits of using Ku-band on the user site and the composite of C and Ku bands on the gateway site. This configuration has proved to be a cost-efficient solution with high performance over the traditional straight configuration. The data rate is improved five times both on upstream and downstream as compared to the existing available FSS system. Moreover, it has got an advantage to Ku-band user that they would enjoy the significant improvement in the performance without upgrading their systems.

Chip size and performance evaluations of shared cache for on-chip multiprocessor

2005 ◽  
Vol 36 (9) ◽  
pp. 1-13
Author(s):  
Takahiro Sasaki ◽  
Tomohiro Inoue ◽  
Nobuhiko Omori ◽  
Tetsuo Hironaka ◽  
Hans J. Mattausch ◽  
...  
Keyword(s):  
Performance Evaluations ◽  
Chip Multiprocessor ◽  
Shared Cache ◽  
Chip Size ◽  
And Performance ◽  
On Chip

scholarly journals Design and Development of a Modified AXI Based BIST Technique for Memory Architectures

2019 ◽  
Vol 8 (4) ◽  
pp. 8023-8029
Keyword(s):  
Fault Detection ◽  
Random Access ◽  
Memory Systems ◽  
Memory Architecture ◽  
Proposed Model ◽  
Overall Performance ◽  
Self Test ◽  
On Chip ◽  
The Cost ◽  
Memory Architectures

Memory testing and fault detection is an important phase in testing the hardware devices. This improves the overall performance of the system and prevents runtime failures in the devices. Built In Self Test (BIST) is a hardware memory test architecture deployed in many System on Chip devices to enable fault detection. This technique reduces the cost and time needed to test the memory systems. Different BIST modules need to be used to detect faults in different memories. As a result, design complexity increases. In order to overcome these above shortcomings, it is essential to develop advanced extensible Interface (AXI) with Block Random Access Memory (BRAM) and Design and Develop AXI based self-test memory architecture (March Algorithms) to achieve parallel read and write capability. The proposed model reduced the dynamic power and the clock cycles needed for simulation when compared to existing techniques

scholarly journals The Impact of Wastewater Treatment Plants Transmitted Diseases on ITS Workforce

2019 ◽  
Vol 8 (12) ◽  
pp. 2852-2856
Keyword(s):  
Wastewater Treatment ◽  
Cohort Study ◽  
Wastewater Treatment Plants ◽  
New Employees ◽  
Water Company ◽  
Cost Efficient ◽  
And Performance ◽  
The Cost ◽  
The Impact ◽  
National Water

This work represents the research, analysis, and recommendation of a study that examined how wastewater treatment plants in the National Water Company in Jeddah workers get exposed to diseases in those environments which later affects their health and performance. The work carried out enables the company to evaluate how the most important risk is that of the employees contracting hepatitis A. In this case, the research was carried on 300 workers on National Water Company in Jeddah who works in these plants. The research study method or design used was an epidemiology perspective cohort study. All these workers had a similar characteristic which was the work environment but differed in various factors such as age, gender, and family history. The aim of the prospective cohort study was to see how workers safety is an issue, how the disease affects the performance of the workers and the cost side as well as how the Human Recourse department finds it hard in finding new employees. In this regard, it is important to note that preventing the disease is considerably more cost-efficient for the company that has to pay for the medical treatment of the sick employees and hire new employees that will perform the work of those sick while they recover. The report ends with both engineering and health recommendations that should be put in place to curb all the issues that wastewater brings to the workers.

Return on Invesment (ROI) of Software Product: A Systematic Literature Review

2015 ◽  
Vol 6 (1) ◽  
pp. 50-57
Author(s):  
Rizqa Raaiqa Bintana ◽  
Putri Aisyiyah Rakhma Devi ◽  
Umi Laili Yuhana
Keyword(s):  
Return On Investment ◽  
Assessment Criteria ◽  
Software Product ◽  
And Performance ◽  
Rational Consideration ◽  
Actual Return ◽  
The Cost ◽  
Investment Models ◽  
The Impact

The quality of the software can be measured by its return on investment. Factors which may affect the return on investment (ROI) is the tangible factors (such as the cost) dan intangible factors (such as the impact of software to the users or stakeholder). The factor of the software itself are assessed through reviewing, testing, process audit, and performance of software. This paper discusses the consideration of return on investment (ROI) assessment criteria derived from the software and its users. These criteria indicate that the approach may support a rational consideration of all relevant criteria when evaluating software, and shows examples of actual return on investment models. Conducted an analysis of the assessment criteria that affect the return on investment if these criteria have a disproportionate effort that resulted in a return on investment of a software decreased. Index Terms - Assessment criteria, Quality assurance, Return on Investment, Software product

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