High-Speed SiGe BiCMOS Technologies and Circuits

2017 ◽  
Vol 26 (01n02) ◽  
pp. 1740002 ◽  
Author(s):  
A. Mai ◽  
I. Garcia Lopez ◽  
P. Rito ◽  
R. Nagulapalli ◽  
A. Awny ◽  
...  
Keyword(s):  
High Frequency ◽  
High Speed ◽  
Heterojunction Bipolar Transistor ◽  
Sige Hbt ◽  
Wave Radar ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Additional Process ◽  
The Difference ◽  
Oscillation Frequencies

This work reports on the development of SiGe-BiCMOS technologies for mm-wave and THz high frequency applications. We present state-of-the-art performances for different SiGe heterojunction bipolar transistor (SiGe-HBT) developments as well as the evolution of complex BiCMOS technologies. With respect to different technology generations of high-speed SiGe-BiCMOS processes at IHP we discuss selected device modifications of the SiGe-HBT to achieve high frequency performances of a complex BiCMOS technology towards the 0.5 THz regime. We show the difference of high-frequency performance difference with respect to maximum achievable transit frequencies fT and oscillation frequencies fmax in comparison to RF-CMOS technologies and depict the required increase of additional process effort for the HBT-module integration for a 0.5 THz SiGe-BiCMOS technology. Moreover different high speed circuits are presented like broadband ICs for optical communication, high frequency circuits for wireless communication at 60 and 240 GHz, mm-wave radar circuits at 60 and 120 GHz as well as THz circuits operating at 245 GHz and 500 GHz for spectroscopic applications. All reviewed circuit examples are based on the discussed 130nm-SiGe-BiCMOS technologies and show their potential for a broad range of high-speed applications.

SiGe HBT/BiCMOS Technologies and their Applications to Communication ICs/LSIs

2004 ◽  
Vol 809 ◽  
Author(s):  
Katsuya Oda ◽  
Katsuyoshi Washio ◽  
Takashi Hashimoto
Keyword(s):  
High Speed ◽  
Cutoff Frequency ◽  
Clock Rate ◽  
Sige Hbt ◽  
Selective Epitaxial Growth ◽  
Communications Systems ◽  
Ultra High Speed ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Doping Profiles

ABSTRACTSelf-aligned ultra-high-speed SiGe HBTs were developed by using selective epitaxial growth (SEG) technology. The use of HCl-free SEG, incorporation of C, and optimization of doping profiles significantly improves the performance of the HBT, producing a transistor with a high cutoff frequency of 170 GHz and a maximum oscillation frequency of 204 GHz, for a minimum ECL gate delay time of 4.8 ps. This is applied in a 16:1 MUX with a maximum clock rate of 57 GHz. A 0.13-μm SiGe BiCMOS technology is also realized without any degradation of CMOS due to the high stability of SiGe HBTs. Furthermore, the structure of SiGe HBT is optimized for an emitter scaled down towards 100 nm, mainly through the use of a funnel-shaped emitter electrode to reduce both emitter and base resistances. High-speed operation of a static frequency divider demonstrates the advantage of SiGe HBTs for ultra-high-speed communications systems.

scholarly journals 10-GHz Fully Differential Sallen–Key Lowpass Biquad Filters in 55nm SiGe BiCMOS Technology

Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 563
Author(s):  
Francesco Centurelli ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Pasquale Tommasino ◽  
Alessandro Trifiletti
Keyword(s):  
Communication Systems ◽  
Power Efficiency ◽  
High Speed ◽  
Closed Loop ◽  
Dynamic Range ◽  
Data Converters ◽  
Fully Differential ◽  
Biquad Filter ◽  
Bicmos Technology ◽  
Sige Bicmos

Multi-GHz lowpass filters are key components for many RF applications and are required for the implementation of integrated high-speed analog-to-digital and digital-to-analog converters and optical communication systems. In the last two decades, integrated filters in the Multi-GHz range have been implemented using III-V or SiGe technologies. In all cases in which the size of passive components is a concern, inductorless designs are preferred. Furthermore, due to the recent development of high-speed and high-resolution data converters, highly linear multi-GHz filters are required more and more. Classical open loop topologies are not able to achieve high linearity, and closed loop filters are preferred in all applications where linearity is a key requirement. In this work, we present a fully differential BiCMOS implementation of the classical Sallen Key filter, which is able to operate up to about 10 GHz by exploiting both the bipolar and MOS transistors of a commercial 55-nm BiCMOS technology. The layout of the biquad filter has been implemented, and the results of post-layout simulations are reported. The biquad stage exhibits excellent SFDR (64 dB) and dynamic range (about 50 dB) due to the closed loop operation, and good power efficiency (0.94 pW/Hz/pole) with respect to comparable active inductorless lowpass filters reported in the literature. Moreover, unlike other filters, it exploits the different active devices offered by commercial SiGe BiCMOS technologies. Parametric and Monte Carlo simulations are also included to assess the robustness of the proposed biquad filter against PVT and mismatch variations.

Direction to improve SiGe BiCMOS technology featuring 200-GHz SiGe HBT and 80-nm gate CMOS

2004 ◽  
Author(s):  
T. Hashimoto ◽  
Y. Nonaka ◽  
T. Tominari ◽  
H. Fujiwara ◽  
K. Tokunaga ◽  
...  
Keyword(s):  
Sige Hbt ◽  
Bicmos Technology ◽  
Sige Bicmos

Low-power 8-bit 5-GS/s digital-to-analog converter for multi-gigabit wireless transceivers

2012 ◽  
Vol 4 (3) ◽  
pp. 275-282 ◽  
Author(s):  
Behnam Sedighi ◽  
Mahdi Khafaji ◽  
Johann Christoph Scheytt
Keyword(s):  
Low Power ◽  
High Speed ◽  
Wireless Transceivers ◽  
Digital To Analog Converter ◽  
Bicmos Technology ◽  
Analog Converter ◽  
Sige Bicmos ◽  
Digital To Analog ◽  
On Chip ◽  
Binary Weighted

We present a method to realize a low-power and high-speed digital-to-analog converter (DAC) for system-on-chip applications. The new method is a combination of binary-weighted current cells and R-2R ladder and is specially suited for modern BiCMOS technologies. A prototype 5 GS/s DAC is implemented in 0.13 μm SiGe BiCMOS technology. The DAC dissipates 26 mW and provides an SFDR higher than 48 dB for output frequencies up to 1 GHz.

A high-frequency divider in 0.18 µm SiGe BiCMOS technology

2006 ◽  
Author(s):  
Noorfazila Kamal ◽  
Yingbo Zhu ◽  
Leonard T. Hall ◽  
Said F. Al-Sarawi ◽  
Craig Burnet ◽  
...  
Keyword(s):  
High Frequency ◽  
Frequency Divider ◽  
Bicmos Technology ◽  
Sige Bicmos

Toward RF System-Level Integration: Process Integration Issues in Sige BICMOS

1998 ◽  
Vol 533 ◽  
Author(s):  
G. Freeman ◽  
K. Schonenberg ◽  
D. Ahlgren ◽  
S-J. Jeng ◽  
D. Nguyen-Ngoc ◽  
...  
Keyword(s):  
Large Scale ◽  
Process Integration ◽  
Crystal Defects ◽  
System Level ◽  
Rf System ◽  
Sige Hbt ◽  
Rf Systems ◽  
Integration Schemes ◽  
Bicmos Technology ◽  
Sige Bicmos

AbstractThe SiGe HBT, integrated with CMOS devices on the same chip, will be the first integrated device combination to realize the long-standing technology goal of fabricating RF systems on a chip. It has been demonstrated that the HBT device can replace the standard GaAs front-end of RF systems and take advantage of the reduced cost available from Si technologies in 200–300mm wafers. However, the SiGe HBT can only be part of a large-scale RF system on a chip when, in the same technology, NFETs and PFETs are provided for low power, low frequency digital logic, and a suite of resistors, capacitors, diodes, and inductor passive elements are provided for the high frequency analog circuitry. Furthermore, all these elements must be manufacturable defect-free at medium and high levels of integration.This paper covers keyprocess integration issues confronting technologists when integrating a SiGe HBT device with the requisite CMOS and passive elements and at the same time maintaining very high GaAs-like performance. Topics to be discussed are 1) a review of high-performance HBT device integration schemes employed to date and integration issues with each scheme, 2)integration issues in epitaxial cleaning and growth techniques, 3) integration issues influencing crystal defects, and 4) integration issues with passive elements. Status of the IBM SiGe BiCMOS technology will be presented to illustrate the first successful integration of this set of devices into a manufacturable process.

scholarly journals A 5–50 GHz SiGe BiCMOS Linear Transimpedance Amplifier with 68 dBΩ Differential Gain towards Highly Integrated Quasi-Coherent Receivers

Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2349
Author(s):  
Guillermo Silva Valdecasa ◽  
Jose A. Altabas ◽  
Monika Kupska ◽  
Jesper Bevensee Jensen ◽  
Tom K. Johansen
Keyword(s):  
System Integration ◽  
High Speed ◽  
Direct Detection ◽  
Scale Up ◽  
Gain Control ◽  
Point System ◽  
Cell Stage ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Coherent Receivers

Quasi-coherent optical receivers have recently emerged targeting access networks, offering improved sensitivity and reach over direct-detection schemes at the expense of a higher receiver bandwidth. Higher levels of system integration together with sufficiently wideband front-end blocks, and in particular high-speed linear transimpedance amplifiers (TIAs), are currently demanded to reduce cost and scale up receiver data rates. In this article, we report on the design and testing of a linear TIA enabling high-speed quasi-coherent receivers. A shunt-feedback loaded common-base topology is adopted, with gain control provided by a subsequent Gilbert cell stage. The circuit was fabricated in a commercial 130 nm SiGe BiCMOS technology and has a bandpass characteristic with a 3 dB bandwidth in the range of 5–50 GHz. A differential transimpedance gain of 68 dBΩ was measured, with 896 mVpp of maximum differential output swing at the 1 dB compression point. System experiments in a quasi-coherent receiver demonstrate an optical receiver sensitivity of −30.5 dBm (BER = 1 × 10−3) at 10 Gbps, and −26 dBm (BER = 1 × 10−3) at 25 Gbps. The proposed TIA represents an enabling component towards highly integrated quasi-coherent receivers.

DESIGN CONSIDERATIONS FOR INTEGRATED MODULATOR DRIVERS IN SILICON GERMANIUM TECHNOLOGY

2005 ◽  
Vol 15 (03) ◽  
pp. 477-495 ◽  
Author(s):  
SHANTHI PAVAN ◽  
MAURICE TARSIA ◽  
STEFFEN KUDSZUS ◽  
DAVID PRITZKAU
Keyword(s):  
Power Supply ◽  
Silicon Germanium ◽  
High Speed ◽  
Design Considerations ◽  
Trade Offs ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Present Design ◽  
Simulation Results ◽  
Modulator Driver

We present design considerations for high speed high swing differential modulator drivers in SiGe BiCMOS technology. Trade-offs between lumped and distributed designs, and linear and limiting amplifiers are examined. The design of a 6 V output modulator driver is discussed in detail. The driver features a unique bias generation and distribution circuit that enables low power-supply operation. Simulation results and measurements are given.

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