A HIGH-PERFORMANCE SEQUENTIAL MRU CACHE USING VALID-BIT ASSISTANT SEARCH ALGORITHM

2007 ◽  
Vol 16 (04) ◽  
pp. 613-626
Author(s):  
HSIN-CHUAN CHEN ◽  
JEN-SHIUN CHIANG
Keyword(s):  
High Performance ◽  
Search Algorithm ◽  
Access Time ◽  
Data Memory ◽  
Average Access Time ◽  
Cache Scheme

Most recently used (MRU) cache is one of the set-associative caches that emphasize implementation of associativity higher than 2. However, the access time is increased because the MRU information must be fetched before accessing the sequential MRU (SMRU) cache. In this paper, focusing on the SMRU cache with subblock placement, we propose an MRU cache scheme that separates the valid bits from data memory and uses these valid bits to decide to reduce the unnecessary access number of memory banks. By this approach, the probability of the front hits is thus increased, and it significantly helps in improving the average access time of the SMRU cache without valid-bit assistant search especially for large associativity and small subblock size.

scholarly journals Decision Tree-Based Adaptive Reconfigurable Cache Scheme

Algorithms ◽  
2021 ◽  
Vol 14 (6) ◽  
pp. 176
Author(s):  
Wei Zhu ◽  
Xiaoyang Zeng
Keyword(s):  
Decision Tree ◽  
Adaptive Algorithms ◽  
Memory Access ◽  
Access Time ◽  
Decision Tree Algorithm ◽  
Verilog Hdl ◽  
Tree Model ◽  
Cache Associativity ◽  
Cache Scheme ◽  
Reconfigurable Cache

Applications have different preferences for caches, sometimes even within the different running phases. Caches with fixed parameters may compromise the performance of a system. To solve this problem, we propose a real-time adaptive reconfigurable cache based on the decision tree algorithm, which can optimize the average memory access time of cache without modifying the cache coherent protocol. By monitoring the application running state, the cache associativity is periodically tuned to the optimal cache associativity, which is determined by the decision tree model. This paper implements the proposed decision tree-based adaptive reconfigurable cache in the GEM5 simulator and designs the key modules using Verilog HDL. The simulation results show that the proposed decision tree-based adaptive reconfigurable cache reduces the average memory access time compared with other adaptive algorithms.

scholarly journals Binary Spring Search Algorithm for Solving Various Optimization Problems

2021 ◽  
Vol 11 (3) ◽  
pp. 1286 ◽  
Author(s):  
Mohammad Dehghani ◽  
Zeinab Montazeri ◽  
Ali Dehghani ◽  
Om P. Malik ◽  
Ruben Morales-Menendez ◽  
...  
Keyword(s):  
Optimization Algorithm ◽  
High Performance ◽  
Optimization Problems ◽  
Search Algorithm ◽  
Gravitational Search Algorithm ◽  
Bat Algorithm ◽  
Search Space ◽  
Binary Particle Swarm Optimization ◽  
Dragonfly Algorithm ◽  
Grasshopper Optimization Algorithm

One of the most powerful tools for solving optimization problems is optimization algorithms (inspired by nature) based on populations. These algorithms provide a solution to a problem by randomly searching in the search space. The design’s central idea is derived from various natural phenomena, the behavior and living conditions of living organisms, laws of physics, etc. A new population-based optimization algorithm called the Binary Spring Search Algorithm (BSSA) is introduced to solve optimization problems. BSSA is an algorithm based on a simulation of the famous Hooke’s law (physics) for the traditional weights and springs system. In this proposal, the population comprises weights that are connected by unique springs. The mathematical modeling of the proposed algorithm is presented to be used to achieve solutions to optimization problems. The results were thoroughly validated in different unimodal and multimodal functions; additionally, the BSSA was compared with high-performance algorithms: binary grasshopper optimization algorithm, binary dragonfly algorithm, binary bat algorithm, binary gravitational search algorithm, binary particle swarm optimization, and binary genetic algorithm. The results show the superiority of the BSSA. The results of the Friedman test corroborate that the BSSA is more competitive.

scholarly journals ACCESS TIME OF EMERGENCY VEHICLES UNDER THE CONDITION OF STREET BLOCKAGES AFTER A LARGE EARTHQUAKE

2016 ◽  
Vol III-4/W1 ◽  
pp. 37-44
Author(s):  
N. Hirokawa ◽  
T. Osaragi
Keyword(s):  
Simulation Model ◽  
Large Scale ◽  
Large Earthquake ◽  
Access Time ◽  
Microscopic Simulation ◽  
Property Damage ◽  
Emergency Vehicles ◽  
Fire Stations ◽  
Average Access Time ◽  
Alternative Routes

The previous studies have been carried out on accessibility in daily life. However it is an important issue to improve the accessibility of emergency vehicles after a large earthquake. In this paper, we analyzed the accessibility of firefighters by using a microscopic simulation model immediately after a large earthquake. More specifically, we constructed the simulation model, which describes the property damage, such as collapsed buildings, street blockages, outbreaks of fires, and fire spreading, and the movement of firefighters from fire stations to the locations of fires in a large-scale earthquake. Using this model, we analyzed the influence of the street-blockage on the access time of firefighters. In case streets are blocked according to property damage simulation, the result showed the average access time is more than 10 minutes in the outskirts of the 23 wards of Tokyo, and there are some firefighters arrive over 20 minutes at most. Additionally, we focused on the alternative routes and proposed that volunteers collect information on street blockages to improve the accessibility of firefighters. Finally we demonstrated that access time of firefighters can be reduced to the same level as the case no streets were blocked if 0.3% of residents collected information in 10 minutes.

scholarly journals Design and implementation of CNTFET based ternary 1x1 memories

2019 ◽  
Vol 8 (3) ◽  
pp. 175 ◽  
Author(s):  
S.Tamil Selvan ◽  
M. Sundararajan
Keyword(s):  
High Performance ◽  
Data Access ◽  
Cmos Technology ◽  
Access Time ◽  
The Novel ◽  
Design And Implementation ◽  
Technology Process ◽  
Sram Cell ◽  
And Performance ◽  
Power Application

In this paper presented Design and implementation of CNTFET based Ternary 1x1 RAM memories high-performance digital circuits. CNTFET Ternary 1x1 SRAM memories is implement using 32nm technology process. The CNTFET decresase the diameter and performance matrics like delay,power and power delay, The CNTFET Ternary 6T SRAM cell consists of two cross coupled Ternary inverters one is READ and another WRITE operations of the Ternary 6T SRAM cell are performed with the Tritline using HSPICE and Tanner tools in this tool is performed high accuracy. The novel based work can be used for Low Power Application and Access time is less of compared to the conventional CMOS Technology. The CNTFET Ternary 6T SRAM array module (1X1) in 32nm technology consumes only 0.412mW power and data access time is about 5.23ns.

scholarly journals Hybrid Multilevel Thresholding and Improved Harmony Search Algorithm for Segmentation

2018 ◽  
Vol 8 (6) ◽  
pp. 4593 ◽  
Author(s):  
Erwin Erwin ◽  
Saparudin Saparudin ◽  
Wulandari Saputri
Keyword(s):  
High Performance ◽  
Search Algorithm ◽  
Signal To Noise Ratio ◽  
Harmony Search ◽  
Optimal Solution ◽  
Harmony Search Algorithm ◽  
Multilevel Thresholding ◽  
Improved Harmony Search ◽  
High Degree ◽  
Improved Harmony Search Algorithm

This paper proposes a new method for image segmentation is hybrid multilevel thresholding and improved harmony search algorithm. Improved harmony search algorithm which is a method for finding vector solutions by increasing its accuracy. The proposed method looks for a random candidate solution, then its quality is evaluated through the Otsu objective function. Furthermore, the operator continues to evolve the solution candidate circuit until the optimal solution is found. The dataset used in this study is the retina dataset, tongue, lenna, baboon, and cameraman. The experimental results show that this method produces the high performance as seen from peak signal-to-noise ratio analysis (PNSR). The PNSR result for retinal image averaged 40.342 dB while for the average tongue image 35.340 dB. For lenna, baboon and cameramen produce an average of 33.781 dB, 33.499 dB, and 34.869 dB. Furthermore, the process of object recognition and identification is expected to use this method to produce a high degree of accuracy.

Final Remarks for the Research With Advanced Machine Learning Methods in Colon Cancer Analysis

2021 ◽  
pp. 151-154
Keyword(s):  
Colon Cancer ◽  
Time Complexity ◽  
High Performance ◽  
Complexity Analysis ◽  
Search Algorithm ◽  
Cancer Treatments ◽  
Cancer Dataset ◽  
Performance Accuracy ◽  
Research Questions

Generally, classification accuracy is very important to gene processing and selection and cancer classification. It is needed to achieve better cancer treatments and improve medical drug assignments. However, the time complexity analysis will enhance the application's significance. To answer the research questions in Chapter 1, several case studies have been implemented (see Chapters 4 and 5), each was essential to sustain the methodologies discussed in Chapter 3. The study used a colon-cancer dataset comprising 2000 genes. The best search algorithm, GA, showed high performance with a good efficient time complexity. However, both DTs and SVMs showed the best classification contribution with reference to performance accuracy and time efficiency. However, it is difficult to apply a completely fair comparative study because existing algorithms and methods were tested by different authors to reflect the effectiveness and powerful of their own methods.

scholarly journals A Stochastic Analysis of Hard Disk Drives

2011 ◽  
Vol 2011 ◽  
pp. 1-21 ◽  
Author(s):  
Field Cady ◽  
Yi Zhuang ◽  
Mor Harchol-Balter
Keyword(s):  
Stochastic Analysis ◽  
Hard Disk Drives ◽  
Closed Form Solution ◽  
Hard Disk ◽  
Form Solution ◽  
Access Time ◽  
Analytical Technique ◽  
Wide Range ◽  
Average Access Time ◽  
Memory Request

We provide a stochastic analysis of hard disk performance, including a closed form solution for the average access time of a memory request. The model we use covers a wide range of types and applications of disks, and in particular it captures modern innovations like zone bit recording. The derivation is based on an analytical technique we call “shuffling”, which greatly simplifies the analysis relative to previous work and provides a simple, easy-to-use formula for the average access time. Our analysis can predict performance of single disks for a wide range of disk types and workloads. Furthermore, it can predict the performance benefits of several optimizations, including short stroking and mirroring, which are common in disk arrays.

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