A 2.5 GHZ CMOS MIXER WITH IMPROVED LINEARITY

2011 ◽  
Vol 20 (02) ◽  
pp. 233-242 ◽  
Author(s):  
ANCA MANOLESCU ◽  
COSMIN POPA
Keyword(s):  
High Frequency ◽  
Harmonic Distortion ◽  
Cmos Technology ◽  
Differential Amplifier ◽  
Third Order ◽  
Input Signals ◽  
Cmos Mixer ◽  
Frequency Mixer ◽  
Total Voltage ◽  
Cross Connection

A new linearization technique for a CMOS high frequency mixer will be presented. The reduction of the total harmonic distortion coefficient is achieved by replacing the simple differential amplifier from the basic multiplier circuit with a cross-connection differential amplifier, with the advantage of canceling the third-order harmonic from the output signal expression. The circuit was implemented in 0.35 μm CMOS technology and it was supplied at a total voltage of 6 V. The transient and Fourier analysis for high frequency input signals (ω1 = ω2 = 2.5 GHz and ω1 = 2.5 GHz; ω2 = 2.25 GHz) confirm the theoretical estimated results (an improvement in linearity of about 8 dB).

A High-Linear CMOS Down Conversion Mixer Using Adjusting the Second and Third-Order Harmonic in Transconductance Stage

2014 ◽  
Vol 24 (01) ◽  
pp. 1550002 ◽  
Author(s):  
Mina Amiri ◽  
Adib Abrishamifar
Keyword(s):  
Low Voltage ◽  
Supply Voltage ◽  
Circuit Simulation ◽  
Cmos Technology ◽  
Conversion Gain ◽  
Third Order ◽  
Cmos Mixer ◽  
Simulation Results ◽  
Down Conversion ◽  
Pmos Transistor

In this paper a new high-linear CMOS mixer is proposed. A well-known low voltage CMOS multiplier structure is used for mixer application in this paper and its linearity is provided by adjusting the value of a resistor, sizing the aspect ratio of a PMOS transistor and adding a proper value of inductor at the input stage. In simulation, a supply voltage as low as 1 V is applied to the circuit. Simulation results of improved mixer in a 0.18-μm CMOS technology illustrate 14 dB increases in IIP3 and also an increase around 1.4 dB is obtained in conversion gain. Furthermore, additional components which are used for improving linearity would not increase the power consumption and area significantly.

scholarly journals New Realization of Quadrature Oscillator using OTRA

2017 ◽  
Vol 7 (4) ◽  
pp. 1815 ◽  
Author(s):  
Gurumurthy Komanaplli ◽  
Neeta Pandey ◽  
Rajeshwari Pandey
Keyword(s):  
High Frequency ◽  
Closed Loop ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Third Order ◽  
Pass Filter ◽  
Fully Integrated ◽  
Quadrature Oscillator ◽  
Electronically Tunable ◽  
High Pass

In this paper a new, operational transresistance amplifier (OTRA) based, third order quadrature oscillator (QO) is presented. The proposed structure forms a closed loop using a high pass filter and differentiator. All the resistors employed in the circuit can be implemented using matched transistors operating in linear region thereby making the proposed structure fully integrated and electronically tunable. The effect of non-idealities of OTRA has been analyzed which suggests that for high frequency applications self-compensation can be used. Workability of the proposed QO is verified through SPICE simulations using 0.18μm AGILENT CMOS process parameters. Total harmonic distortion (THD) for the proposed QO is found to be less than 2.5%.The sensitivity, phasenoise analysis is also discussed for the proposed structure.

scholarly journals OTRA Based Voltage Mode Third Order Quadrature Oscillator

2014 ◽  
Vol 2014 ◽  
pp. 1-5 ◽  
Author(s):  
Rajeshwari Pandey ◽  
Neeta Pandey ◽  
Gurumurthy Komanapalli ◽  
Rashika Anurag
Keyword(s):  
Process Parameters ◽  
High Frequency ◽  
Oscillation Frequency ◽  
Harmonic Distortion ◽  
Cmos Process ◽  
Third Order ◽  
Linear Region ◽  
Fully Integrated ◽  
Electronic Tuning ◽  
Quadrature Oscillators

Two topologies of operational transresistance (OTRA) based third order quadrature oscillators (QO) are proposed in this paper. The proposed oscillators are designed using a combination of lossy and lossless integrators. The proposed topologies can be made fully integrated by implementing the resistors using matched transistors operating in linear region, which also facilitates electronic tuning of oscillation frequency. The nonideality analysis of the circuit is also given and for high frequency applications self-compensation can be used. Workability of the proposed QOs is verified through PSPICE simulations using 0.5 μm AGILENT CMOS process parameters. The total harmonic distortion (THD) for both the QO designs is found to be less than 1%.

Planar MOCVD GaAlAs/GaAs high-frequency mixer diodes

1985 ◽  
Vol 21 (7) ◽  
pp. 305
Author(s):  
A. Christou ◽  
M.C. Peckerar
Keyword(s):  
High Frequency ◽  
Frequency Mixer

Second- and third-order harmonic distortion in DFB lasers

1995 ◽  
Vol 31 (11) ◽  
pp. 1974-1980 ◽  
Author(s):  
Liming Zhang ◽  
D.A. Ackerman
Keyword(s):  
Harmonic Distortion ◽  
Third Order

scholarly journals Design and Analysis of a Repetitive Current Controller for a Single-Phase Bridgeless SEPIC PFC Converter

Energies ◽  
2018 ◽  
Vol 12 (1) ◽  
pp. 131 ◽  
Author(s):  
Jinwoo Kim ◽  
Sanghun Han ◽  
Wontae Cho ◽  
Younghoon Cho ◽  
Hyunsoo Koh
Keyword(s):  
Controller Design ◽  
Harmonic Distortion ◽  
Input Current ◽  
Order Model ◽  
Third Order ◽  
Current Controller ◽  
The Stability ◽  
Small Signal Modeling ◽  
Fifth Order ◽  
Repetitive Controller

This paper studies a repetitive controller design scheme for a bridgeless single-ended primary inductor converter (SEPIC) power factor correction (PFC) converter to mitigate input current distortions. A small signal modeling of the converter is performed by a fifth-order model. Since the fifth-order model is complex to be applied in designing a current controller, the model is approximated to a third-order model. Using the third-order model, the repetitive controller is designed to reduce the input current distortion. Then, the stability of the repetitive controller is verified with an error transfer function. The proposed controller performance is validated by simulation, and the experiment results show that the input current total harmonic distortion (THD) is improved by applying the proposed controller for an 800 W bridgeless SEPIC PFC converter prototype.

scholarly journals Design of a Class-D Audio Amplifier With Analog Volume Control for Mobile Applications

2016 ◽  
Vol 62 (2) ◽  
pp. 187-196
Author(s):  
Karim El khadiri ◽  
Hassan Qjidaa
Keyword(s):  
Power Efficiency ◽  
High Efficiency ◽  
Harmonic Distortion ◽  
Cmos Technology ◽  
Volume Control ◽  
Ramp Generator ◽  
Audio Amplifier ◽  
Class D ◽  
Level Shifter ◽  
Programmable Gain

Abstract A class-D audio amplifier with analog volume control (AVC) for portable applications is proposed in this paper. The proposed class-D consist of two sections. First section is an analog volume control which consists of an integrator, an analog MUX and a programmable gain amplifier (PGA). The AVC is implemented with three analog inputs (Audio, Voice, FM). Second section is a driver which consists of a ramp generator, a comparator, a level shifter and a gate driver. The driver is designed to obtain a low distortion and a high efficiency. Designed with 0.18 um 1P6M CMOS technology, the class-D audio amplifier with AVC achieves a total root-mean-square (RMS) output power of 0.5W, a total harmonic distortion plus noise (THD+N) at the 8-Ω load less than 0.06% and a power efficiency of 90% with a total area of 1.74 mm2.

A design methodology for acoustic resonance-free, high-frequency, dimmable electronic ballast for high-pressure sodium-vapour lamps

2019 ◽  
Vol 52 (4) ◽  
pp. 524-539
Author(s):  
B Gupta Bakshi ◽  
B Roy
Keyword(s):  
High Pressure ◽  
High Frequency ◽  
Design Methodology ◽  
Power Level ◽  
Harmonic Distortion ◽  
Acoustic Resonance ◽  
Electrical Characteristics ◽  
Electronic Ballast ◽  
Lamp Current ◽  
Sodium Vapour

This paper presents a methodology to design acoustic resonance-free, high-frequency, dimmable electronic ballasts for high-pressure sodium vapour (HPSV) lamps having a range of rated wattage (70–400 W). After estimation of the ‘quiet window’ of an HPSV lamp, the proposed iterative algorithm is able to determine the acoustic resonance-free driving frequencies of a design ballast corresponding to 50%–100% power level. On the other hand, a developed wattage and voltage independent HPSV lamp model facilitates finding the required electrical characteristics of HPSV lamps without performing laboratory experimentation. Using the estimated driving frequencies of a design ballast and the synthesized electrical characteristics of the lamp, the design circuit parameters of an electronic ballast are determined. Performance evaluation of the designed ballasts, carried out on the Matlab–Simulink platform, indicates several important attributes, viz. higher power control accuracy (deviation ≤3.69%), near-unity lamp power factor (≥0.98), lower lamp current crest factor (<1.7) and lower lamp current total harmonic distortion (≤12.63%). Results establish the effectiveness of the proposed design methodology to design lightweight and compact electronic ballasts for HPSV lamps with less effort than conventional design practice.

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