An Improved Symmetric H-Bridge Multilevel Converter Topology; An Attempt to Reduce Power Losses

2018 ◽  
Vol 27 (12) ◽  
pp. 1850187 ◽  
Author(s):  
Rasoul Shalchi Alishah ◽  
Seyed Hossein Hosseini ◽  
Ebrahim Babaei ◽  
Mehran Sabahi ◽  
Jaber Fallah Ardashir
Keyword(s):  
Harmonic Distortion ◽  
Power Losses ◽  
Multilevel Converter ◽  
Switching Losses ◽  
Current Path ◽  
Comparison Results ◽  
Converter Topology ◽  
Gate Driver ◽  
Level Converter ◽  
Symmetric Structures

In this paper, a new structure for multilevel converter based on improved H-bridge converter is presented. The proposed topology is a symmetric topology since the values of all voltage sources are equal. The proposed symmetric structure is a general topology which can be extended for any number of voltage levels at output voltage waveform to obtain the least value of total harmonic distortion (THD). Reduction of switching losses, conduction losses, the number of on-state switches in the current path, utilized DC voltage sources, and gate driver circuits are the main advantages of proposed symmetric structures in comparison with other symmetric topologies. All mathematical analysis on the proposed structure is presented in terms of power losses and maximum blocked voltage by switches. The comparison results with other recently presented symmetric topologies and traditional multilevel converter structures are provided. Experimental results for a thirteen-level converter based on presented structure are provided to validate the practicality of the suggested multilevel structure.

Simulation and Analysis of Novel Extendable Multilevel Inverter Topology

2019 ◽  
Vol 28 (06) ◽  
pp. 1950089 ◽  
Author(s):  
V. Thiyagarajan ◽  
P. Somasundaram ◽  
K. Ramash Kumar
Keyword(s):  
Single Phase ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Voltage Waveform ◽  
Dc Voltage ◽  
Switching Losses ◽  
Comparison Results ◽  
Symmetrical Condition ◽  
Gate Driver ◽  
Inverter Topology

Multilevel inverter (MLI) has become more popular in high power, high voltage industries owing to its high quality output voltage waveform. This paper proposes a novel single phase extendable type MLI topology. The term ‘extendable’ is included since the presented topology can be extended with maximum number of dc voltage sources to synthesize larger output levels. This topology can be operated in both symmetrical and asymmetrical conditions. The major advantages of the proposed inverter topology include minimum switching components, reduced gate driver circuits, less harmonic distortion and reduced switching losses. The comparative analysis based on the number of switches, dc voltage sources and conduction switches between the proposed topology and other existing topologies is presented in this paper. The comparison results show that the proposed inverter topology requires fewer components. The performance of the proposed MLI topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter topology and also the feasibility of the presented topology during the symmetrical condition has been validated experimentally.

A Developed Two-Leg Ladder Multilevel Converter Structure

2018 ◽  
Vol 27 (12) ◽  
pp. 1850183 ◽  
Author(s):  
Rasoul Shalchi Alishah ◽  
Ebrahim Babaei ◽  
Seyed Hossein Hosseini ◽  
Mehran Sabahi
Keyword(s):  
Output Voltage ◽  
Voltage Drop ◽  
Bipolar Transistors ◽  
Power Losses ◽  
Voltage Waveform ◽  
Multilevel Converters ◽  
Structure Comparison ◽  
Comparison Results ◽  
Gate Driver ◽  
Level Converter

The applications of multilevel converters (MCs) in industry have been increased because of their advantages such as high quality output waveform and lower harmonic distortions. This paper proposes an improved two-leg ladder topology for MC. For generating all levels at output voltage waveform, two methods are investigated for selecting the values of dc sources. The suggested structure generates a large number of levels at output voltage waveform with the least number of power electronic components such as insulated gate bipolar transistors, gate driver circuits, dc voltage sources and anti-parallel diodes in comparison with other similar topologies. Also, the magnitude of blocked voltage by switches is low. Power losses analysis on the proposed topology is provided. It is shown that the number of on-state switches in the presented structure is less than other similar topologies, which causes the voltage drop and power losses of proposed topology to be reduced. To show the merits of the proposed structure, comparison results are provided with other structures. To validate the analytical results of proposed topology, an experimental work for a 9-level converter and the simulation results for a 25-level converter are provided. PSCAD/EMTDC software is used for simulation works.

scholarly journals Performance Comparison of 2L-VSC, 3L-NPC, and 3L-MMC Converter Topologies for Interfacing Grid-Connected Systems

2021 ◽  
Author(s):  
Victor R. F. B. de Souza ◽  
Luciano S. Barros ◽  
Flavio B. Costa
Keyword(s):  
Reactive Power ◽  
Harmonic Distortion ◽  
Performance Comparison ◽  
Test Results ◽  
Multilevel Converter ◽  
Simulation Test ◽  
Comparative Performance ◽  
Higher Power ◽  
Converter Topologies ◽  
Level Converter

Nowadays, power converters play a fundamental role in the conditioning and processing of active and reactive power, and are directly related to power quality indexes. In this sense, new multi-level converter topologies have been integrated in order to provide higher power processing capacity with lower harmonic distortion, switch stress, heating, and losses. The use of these structures compared to conventional two-level converters is especially suitable for high power of the order of megawatt. Considering the relevance of this approach, this paper presents a comparative performance analysis among the conventional two-level topology (2L-VSC) and two multilevel topologies in a grid-connected system: neutral point clamped (NPC) and modular multilevel converter (MMC). Simulation test results present the impacts on voltages and currents for the switches and the whole system, as well as the evaluation of the total harmonic distortion (THD) in order to highlight the crucial points of each topology for this kind of application.

Modelling and Simulation of a Sensorless Control of a True Asymmetric Cascade H-Bridge Multilevel Inverter PMSM Drives

2016 ◽  
Vol 7 (2) ◽  
pp. 397
Author(s):  
Kamel Saleh ◽  
Mark Sumner
Keyword(s):  
Harmonic Distortion ◽  
Modelling And Simulation ◽  
Multilevel Inverter ◽  
Current Response ◽  
Multilevel Converter ◽  
Ac Motor ◽  
Speed Range ◽  
Simulation Results ◽  
Level Converter ◽  
Wide Speed Range

This paper introduces a new method to track the saliency of an AC motor fed by a multilevel converter through measuring the dynamic current response of the motor line currents due the IGBT switching actions. The method uses only the fundamental PWM waveform (i.e there is no modification to the operation of the multilevel converter) similar to the fundamental PWM method proposed for a 2-level converter. Simulation results are provided to demonstrate the performance of the complete sensorless speed control of a PM motor driven by such a converter over a wide speed range. Finally the paper introduces a comparison between the 2-level converter and the multilevel converter in terms of the reduction of the Total Harmonic Distortion (THD) using the fundamental PWM method in both cases.

A Segmented Ladder-Structured Multilevel Inverter for Switch Count Remission and Dual-Mode Savvy

2018 ◽  
Vol 27 (14) ◽  
pp. 1850223 ◽  
Author(s):  
G. Chitrakala ◽  
N. Stalin ◽  
V. Mohan
Keyword(s):  
High Power ◽  
Electromagnetic Compatibility ◽  
Harmonic Distortion ◽  
Electric Utility ◽  
Multilevel Inverter ◽  
Heat Sinks ◽  
Switching Losses ◽  
Gate Driver ◽  
Protection Circuits ◽  
Switch Voltage

The multilevel inverter (MLI) has ascertained its gravity in high-power applications for the past three decades through perennial topological modifications from the pristine structure and development of apposite modulation strategies. The benefits, including subtle switch voltage stress, reduced output voltage total harmonic distortion (THD), tolerable electromagnetic compatibility (EMC), minimal switching losses and [Formula: see text]/[Formula: see text] stress, have prepared it as a very promising candidate in high-power drives and electric utility applications. Meanwhile, MLI has few drawbacks such as higher number of switches with associated peripherals (gate driver circuits, protection circuits and heat sinks) which makes the overall system complex, bulky and costly. There have been many attempts to curb the component count in MLI structure. In this paper, a new topology is developed with a perspective to wane the switch count, which also has the ability of working in both symmetrical and asymmetrical modes. The performance of the proposed segmented ladder-structured MLI (SLSMLI) topology is substantiated with simulation study and experimentation.

scholarly journals Generalized Cascaded Symmetric and Level Doubling Multilevel Converter Topology with Reduced THD for Photovoltaic Applications

Electronics ◽  
2019 ◽  
Vol 8 (2) ◽  
pp. 161 ◽  
Author(s):  
Karthikeyan D ◽  
Vijayakumar K ◽  
Jagabar M
Keyword(s):  
Low Voltage ◽  
Harmonic Distortion ◽  
Prototype Model ◽  
Switched Capacitor ◽  
Multilevel Converter ◽  
Dc Offset ◽  
Modulation Technique ◽  
Photovoltaic Applications ◽  
Converter Topologies ◽  
Converter Topology

In this paper, two different converter topologies for a basic new switched capacitor diode converter with a reduced number of power electronics components, suitable for grid connected photovoltaic applications were proposed. The two different structures of switched diode multilevel converter proposed were: (i) cascaded switched diode and (ii) cascaded switched diode with doubling circuit. The switched-diode multilevel converter was compared with other recent converters. In addition, a new dc offset nearest level modulation technique was proposed. This proposed dc offset technique offers low voltage total harmonic distortion (THD) and high RMS output voltage. The proposed modulation technique was compared with conventional nearest level modulation (NLM) and modified NLM control techniques. The performance of the proposed dc offset modulation technique was implemented using a FPGA Spartan 3E controller and tested with a novel switched capacitor-diode multilevel converter. However, to prove the authenticity of the switched-diode multilevel converter and modulation technique, a laboratory-based prototype model for 7-level and 13-level converters was developed.

scholarly journals Real-Time Selective Harmonic Mitigation Technique for Power Converters Based on the Exchange Market Algorithm

Energies ◽  
2020 ◽  
Vol 13 (7) ◽  
pp. 1659
Author(s):  
Abraham Marquez Alcaide ◽  
Jose I. Leon ◽  
Marta Laguna ◽  
Francisco Gonzalez-Rodriguez ◽  
Ramon Portillo ◽  
...  
Keyword(s):  
Real Time ◽  
High Power ◽  
Pulse Width Modulation ◽  
Power Converters ◽  
Harmonic Distortion ◽  
Harmonic Spectrum ◽  
Exchange Market ◽  
Switching Losses ◽  
Harmonic Mitigation ◽  
Level Converter

Hand-in-hand with the smart-grid paradigm development, power converters used in high-power applications are facing important challenges related to efficiency and power quality. To overcome these issues, the pre-programmed Pulse-Width Modulation (PWM) methods have been extensively applied to reduce the harmonic distortion with very low power switching losses for high-power converters. Among the pre-programmed PWM techniques, Selective Harmonic Elimination (SHE) has been the prevailing solution, but recently, Selective Harmonic Mitigation (SHM) stands as a superior alternative to provide further control of the harmonic spectrum with similar losses. However, the large computational burden required by the SHM method to find a solution confines it as an off-line application, where the switching set valid solutions are pre-computed and stored in a memory. In this paper, for the first time, a real-time implementation of SHM using an off-the-shelf mid-range microcontroller is presented and tested. The Exchange Market Algorithm (EMA), initially focused on optimizing financial transactions, is considered and executed to achieve the SHM targets. The performance of the EMA-based SHM is presented showing experimental results considering a reduced number of switching angles applied to a specific three-level converter, but the method can be extrapolated to any other three-level converter topology.

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