A Developed Two-Leg Ladder Multilevel Converter Structure

2018 ◽  
Vol 27 (12) ◽  
pp. 1850183 ◽  
Author(s):  
Rasoul Shalchi Alishah ◽  
Ebrahim Babaei ◽  
Seyed Hossein Hosseini ◽  
Mehran Sabahi
Keyword(s):  
Output Voltage ◽  
Voltage Drop ◽  
Bipolar Transistors ◽  
Power Losses ◽  
Voltage Waveform ◽  
Multilevel Converters ◽  
Structure Comparison ◽  
Comparison Results ◽  
Gate Driver ◽  
Level Converter

The applications of multilevel converters (MCs) in industry have been increased because of their advantages such as high quality output waveform and lower harmonic distortions. This paper proposes an improved two-leg ladder topology for MC. For generating all levels at output voltage waveform, two methods are investigated for selecting the values of dc sources. The suggested structure generates a large number of levels at output voltage waveform with the least number of power electronic components such as insulated gate bipolar transistors, gate driver circuits, dc voltage sources and anti-parallel diodes in comparison with other similar topologies. Also, the magnitude of blocked voltage by switches is low. Power losses analysis on the proposed topology is provided. It is shown that the number of on-state switches in the presented structure is less than other similar topologies, which causes the voltage drop and power losses of proposed topology to be reduced. To show the merits of the proposed structure, comparison results are provided with other structures. To validate the analytical results of proposed topology, an experimental work for a 9-level converter and the simulation results for a 25-level converter are provided. PSCAD/EMTDC software is used for simulation works.

An Improved Symmetric H-Bridge Multilevel Converter Topology; An Attempt to Reduce Power Losses

2018 ◽  
Vol 27 (12) ◽  
pp. 1850187 ◽  
Author(s):  
Rasoul Shalchi Alishah ◽  
Seyed Hossein Hosseini ◽  
Ebrahim Babaei ◽  
Mehran Sabahi ◽  
Jaber Fallah Ardashir
Keyword(s):  
Harmonic Distortion ◽  
Power Losses ◽  
Multilevel Converter ◽  
Switching Losses ◽  
Current Path ◽  
Comparison Results ◽  
Converter Topology ◽  
Gate Driver ◽  
Level Converter ◽  
Symmetric Structures

In this paper, a new structure for multilevel converter based on improved H-bridge converter is presented. The proposed topology is a symmetric topology since the values of all voltage sources are equal. The proposed symmetric structure is a general topology which can be extended for any number of voltage levels at output voltage waveform to obtain the least value of total harmonic distortion (THD). Reduction of switching losses, conduction losses, the number of on-state switches in the current path, utilized DC voltage sources, and gate driver circuits are the main advantages of proposed symmetric structures in comparison with other symmetric topologies. All mathematical analysis on the proposed structure is presented in terms of power losses and maximum blocked voltage by switches. The comparison results with other recently presented symmetric topologies and traditional multilevel converter structures are provided. Experimental results for a thirteen-level converter based on presented structure are provided to validate the practicality of the suggested multilevel structure.

Simulation and Analysis of Novel Extendable Multilevel Inverter Topology

2019 ◽  
Vol 28 (06) ◽  
pp. 1950089 ◽  
Author(s):  
V. Thiyagarajan ◽  
P. Somasundaram ◽  
K. Ramash Kumar
Keyword(s):  
Single Phase ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Voltage Waveform ◽  
Dc Voltage ◽  
Switching Losses ◽  
Comparison Results ◽  
Symmetrical Condition ◽  
Gate Driver ◽  
Inverter Topology

Multilevel inverter (MLI) has become more popular in high power, high voltage industries owing to its high quality output voltage waveform. This paper proposes a novel single phase extendable type MLI topology. The term ‘extendable’ is included since the presented topology can be extended with maximum number of dc voltage sources to synthesize larger output levels. This topology can be operated in both symmetrical and asymmetrical conditions. The major advantages of the proposed inverter topology include minimum switching components, reduced gate driver circuits, less harmonic distortion and reduced switching losses. The comparative analysis based on the number of switches, dc voltage sources and conduction switches between the proposed topology and other existing topologies is presented in this paper. The comparison results show that the proposed inverter topology requires fewer components. The performance of the proposed MLI topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter topology and also the feasibility of the presented topology during the symmetrical condition has been validated experimentally.

scholarly journals A Reduced Switch Count Seven Level Symmetrical Inverter with Low Distortion

2021 ◽  
Vol 10 (2) ◽  
pp. 181-186
Author(s):  
V Balaji ◽  
◽  
Uppili Subha ◽  
G Joga Rao ◽  
◽  
...  
Keyword(s):  
Output Voltage ◽  
Voltage Waveform ◽  
Multilevel Inverters ◽  
Gate Driver ◽  
Index Terms ◽  
Low Distortion ◽  
Day By Day

Various types of new structures in multilevel inverters are evolving day by day. One among those is the reduced switch count type multilevel inverters. This inverter consists of low number of switches, gate driver components, and other switches like auxiliary switches. Depending on the value of the voltage sources we have symmetrical and asymmetrical multilevel inverters. In this paper, the seven level symmetrical inverter design is shown for seven levels in its output. The output voltage waveform is plotted and its FFT is performed and the THD values are shown. The inverter is simulated in SIMULINK software. Index Terms: Seven level MLI, inverter, and Modular Inverter.

scholarly journals Comparative Analysis of Various Multicarrier Modulation Techniques for Different Multilevel Converters

2018 ◽  
Vol 24 (12) ◽  
pp. 45-59
Author(s):  
Omar Talal Mahmood Altaee ◽  
Ahmed M. T. Ibraheem Alnaib
Keyword(s):  
Output Voltage ◽  
Renewable Energy Sources ◽  
Harmonic Distortion ◽  
Multicarrier Modulation ◽  
The Other ◽  
Distortion Factor ◽  
Multilevel Converters ◽  
Modulation Techniques ◽  
High Power Operation ◽  
Level Converter

The applications of Multilevel Converter (MLC) are increased because of the huge demand for clean power; especially these types of converters are compatible with the renewable energy sources. In addition, these new types of converters have the capability of high voltage and high power operation. A Nine-level converter in three modes of implementation; Diode Clamped-MLC (DC-MLC), Capacitor Clamped-MLC (CC-MLC), and the Modular Structured-MLC (MS-MLC) are analyzed and simulated in this paper. Various types of Multicarrier Modulation Techniques (MMTs) (Level shifted (LS), and Phase shifted (PS)) are used for operating the proposed Nine level - MLCs. Matlab/Simulink environment is used for the simulation, extracting, and analysis the results. Finally, a comparison is made between the results for all topologies that are implemented regarding to the criteria of the output voltage waveforms harmonic distortion factor, No. of the necessitated power components, and the complexity of each circuit. Based on simulation results, the MS-MLC is finer as compared to the other types of MLCs. It also observed that the MLCs (with three types) using Phase Opposition Disposition (POD) technique is performed better in terms of getting greater fundamental output voltage and lower THD% as compared to the other techniques.  

scholarly journals FPGA Based Symmetrical Multi Level Inverter with Reduced Gate Driver Circuits

2018 ◽  
Vol 6 (1) ◽  
pp. 53
Author(s):  
G. Durga Prasad ◽  
V Jegathesan
Keyword(s):  
High Voltage ◽  
High Power ◽  
Output Voltage ◽  
Experimental Results ◽  
Sinusoidal Wave ◽  
Font Size ◽  
Multilevel Converters ◽  
Dc Voltage ◽  
Gate Driver ◽  
Multi Level

<span style="font-size: 9pt; font-family: 'Times New Roman', serif;">Multilevel converters tender advantages in terms of the output waveform quality due to the increased number of levels used in the output voltage modulation and have been widely accepted for high-power high-voltage applications.  This paper introduces topology in multilevel dc link inverter (MLDCLI), which can significantly reduce the switch count and improve the performance.<strong> </strong>The preferred topology provides a dc voltage with the shape of a staircase approximating the rectified shape of a commanded sinusoidal wave, to the bridge inverter, which in turn gives the required alternating waveform<strong>.</strong> This topology requires fewer components compared to traditional Multi level Inverters (MLI).Therefore, the overall cost and complexity are significantly reduced particularly for higher output voltage levels. Finally, </span><span style="font-size: 9pt; font-family: 'Times New Roman', serif;" lang="EN-GB">Matlab/Simulink and XILINX are used as a simulation and compiler architecture of control circuit embedded in FPGA. Simulation and experimental results for fifteen-level inverter are presented for validation</span><span style="font-size: 9pt; font-family: 'Times New Roman', serif;">.</span>

Research of Simulation in the Main Circuit of Static Var Generator Based on Cascade H-Bride

2013 ◽  
Vol 392 ◽  
pp. 409-412
Author(s):  
Xian Bin Dai ◽  
Xiao Hua Yuan ◽  
Wei Du
Keyword(s):  
Output Voltage ◽  
Power Index ◽  
Matlab Simulation ◽  
Voltage Waveform ◽  
Distortion Factor ◽  
Harmonic Content ◽  
Three Phase ◽  
Static Var Generator ◽  
Waveform Distortion ◽  
Working Principle

This paper introduces the working principle of the research of simulation in the main circuit of Static Var Generator based on Cascade H-Bride and takes the three-phase Static Var Generator based on cascade H-Bride with rated capacity 10kVar,rated voltage 380V for example to proceed the MATLAB simulation. The research shows that the more amount of cascade H-Bride, the more number of output voltage levels in the main circuit of Static Var Generator, the smaller value of voltage waveform distortion factor, and the less harmonic content be inject in electric network, which improves power index.

scholarly journals Parasitic-Based Active Gate Driver Improving the Turn-On Process of 1.7 kV SiC Power MOSFET

2021 ◽  
Vol 11 (5) ◽  
pp. 2210
Author(s):  
Bartosz Lasek ◽  
Przemysław Trochimiuk ◽  
Rafał Kopacz ◽  
Jacek Rąbkowski
Keyword(s):  
Gate Voltage ◽  
Drain Current ◽  
Theoretical Background ◽  
Dissipated Energy ◽  
Feedback Signal ◽  
Power Losses ◽  
Turn On ◽  
Speed Up ◽  
Gate Driver ◽  
The Right

This article discusses an active gate driver for a 1.7 kV/325 A SiC MOSFET module. The main purpose of the driver is to adjust the gate voltage in specified moments to speed up the turn-on cycle and reduce the amount of dissipated energy. Moreover, an adequate manipulation of the gate voltage is necessary as the gate current should be reduced during the rise of the drain current to avoid overshoots and oscillations. The gate voltage is switched at the right moments on the basis of the feedback signal provided from a measurement of the voltage across the parasitic source inductance of the module. This approach simplifies the circuit and provides no additional power losses in the measuring circuit. The paper contains the theoretical background and detailed description of the active gate driver design. The model of the parasitic-based active gate driver was verified using the double-pulse procedure both in Saber simulations and laboratory experiments. The active gate driver decreases the turn-on energy of a 1.7 kV/325 A SiC MOSFET by 7% comparing to a conventional gate driver (VDS = 900 V, ID = 270 A, RG = 20 Ω). Furthermore, the proposed active gate driver lowered the turn-on cycle time from 478 to 390 ns without any serious oscillations in the main circuit.

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