NOVEL REVERSIBLE FAULT TOLERANT ERROR CODING AND DETECTION CIRCUITS

2011 ◽  
Vol 09 (02) ◽  
pp. 723-738 ◽  
Author(s):  
MAJID HAGHPARAST ◽  
KEIVAN NAVI
Keyword(s):  
Error Detection ◽  
Fault Tolerant ◽  
Quantum Cost ◽  
Hamming Code ◽  
Code Generator ◽  
Flip Flop ◽  
Cmos Design ◽  
Error Coding ◽  
Error Detector ◽  
First Time

Reversible logic is an emerging area of research, having applications in nanotechnology, low power CMOS design, quantum computing, and DNA computing. In this paper, two different parity-preserving reversible error coding and detection circuits are studied. First we propose two new reversible Hamming code generator circuits. One of them is parity-preserve. We also propose a new parity-preserving reversible Hamming code error detector circuit. The proposed parity-preserving reversible Hamming code generator (PPHCG) and error detector circuits provide single error correction–double error detection (SEC–DED). The designs are better than the existing counterparts in terms of quantum cost (QC), number of constant inputs, and number of garbage outputs. Then we propose parity-preserving reversible cyclic code encoder/decoder circuits for the first time. A parity-preserving reversible D flip-flop is also proposed. Equivalent quantum representation of two parity-preserving 4 ∗ 4 reversible gates, IG, and PPHCG, are also proposed. We show for the first time that IG has a QC of only 7 and PPHCG has a QC of only 6.

NOVEL QUANTUM COMPRESSOR DESIGNS USING NEW GENETIC ALGORITHM-BASED SIMULATOR, ANALYZER AND SYNTHESIZER SOFTWARE IN NANOTECHNOLOGY

2010 ◽  
Vol 08 (07) ◽  
pp. 1219-1231 ◽  
Author(s):  
MAJID HAGHPARAST ◽  
MAJID MOHAMMADI
Keyword(s):  
Genetic Algorithm ◽  
Quantum Computing ◽  
Optical Computing ◽  
Logic Circuits ◽  
Basic Block ◽  
Quantum Cost ◽  
Cmos Design ◽  
Low Power Cmos ◽  
First Time ◽  
Better Than

Quantum and reversible logic circuits have found emerging attentions in nanotechnology, optical computing, quantum computing, and low power CMOS design. In this paper, we propose some new quantum and reversible compressors using our new genetic algorithm-based simulator, analyzer, and synthesizer software. The proposed quantum 4:2 and 6:2 compressor circuits are compared with the existing counterparts in terms of number of constant inputs, number of garbage outputs, delay and the quantum cost (QC). We have also designed quantum 7:2 compressor for the first time. The proposed quantum compressors are optimized in terms of QC and delay. The proposed designs can be used as a basic block in complex systems like multipliers, and can execute complicated operations better than the existing designs in literature.

Performance Analysis of Hamming Code for Fault Tolerant 8-bit data bus in VDSM technology

2010 ◽  
Vol 4 (4) ◽  
pp. 55-60
Author(s):  
Sathish A ◽  
M. Chennakesavulu ◽  
M. Madhavi Latha ◽  
K. Lal Kishore
Keyword(s):  
Performance Analysis ◽  
Fault Tolerant ◽  
Hamming Code ◽  
Data Bus

scholarly journals Exponential suppression of bit or phase errors with cyclic error correction

Nature ◽  
2021 ◽  
Vol 595 (7867) ◽  
pp. 383-387
Author(s):  
◽  
Zijun Chen ◽  
Kevin J. Satzinger ◽  
Juan Atalaya ◽  
Alexander N. Korotkov ◽  
...  
Keyword(s):  
Error Correction ◽  
Error Detection ◽  
Fault Tolerant ◽  
Error Rates ◽  
Quantum Error Correction ◽  
Superconducting Qubits ◽  
Two Dimensional ◽  
Logical Error ◽  
Quantum Error ◽  
Logical Qubit

AbstractRealizing the potential of quantum computing requires sufficiently low logical error rates1. Many applications call for error rates as low as 10−15 (refs. 2–9), but state-of-the-art quantum platforms typically have physical error rates near 10−3 (refs. 10–14). Quantum error correction15–17 promises to bridge this divide by distributing quantum logical information across many physical qubits in such a way that errors can be detected and corrected. Errors on the encoded logical qubit state can be exponentially suppressed as the number of physical qubits grows, provided that the physical error rates are below a certain threshold and stable over the course of a computation. Here we implement one-dimensional repetition codes embedded in a two-dimensional grid of superconducting qubits that demonstrate exponential suppression of bit-flip or phase-flip errors, reducing logical error per round more than 100-fold when increasing the number of qubits from 5 to 21. Crucially, this error suppression is stable over 50 rounds of error correction. We also introduce a method for analysing error correlations with high precision, allowing us to characterize error locality while performing quantum error correction. Finally, we perform error detection with a small logical qubit using the 2D surface code on the same device18,19 and show that the results from both one- and two-dimensional codes agree with numerical simulations that use a simple depolarizing error model. These experimental demonstrations provide a foundation for building a scalable fault-tolerant quantum computer with superconducting qubits.

Efficient reversible quantum design of sig-magnitude to two's complement converters

2020 ◽  
Vol 20 (9&10) ◽  
pp. 747-765
Author(s):  
F. Orts ◽  
G. Ortega ◽  
E.M. E.M. Garzon
Keyword(s):  
Quantum Computing ◽  
Scientific Community ◽  
Quantum Computer ◽  
Fault Tolerant ◽  
State Of The Art ◽  
The Other ◽  
Quantum Computers ◽  
Binary Number ◽  
Quantum Cost ◽  
The One

Despite the great interest that the scientific community has in quantum computing, the scarcity and high cost of resources prevent to advance in this field. Specifically, qubits are very expensive to build, causing the few available quantum computers are tremendously limited in their number of qubits and delaying their progress. This work presents new reversible circuits that optimize the necessary resources for the conversion of a sign binary number into two's complement of N digits. The benefits of our work are two: on the one hand, the proposed two's complement converters are fault tolerant circuits and also are more efficient in terms of resources (essentially, quantum cost, number of qubits, and T-count) than the described in the literature. On the other hand, valuable information about available converters and, what is more, quantum adders, is summarized in tables for interested researchers. The converters have been measured using robust metrics and have been compared with the state-of-the-art circuits. The code to build them in a real quantum computer is given.

scholarly journals BIT ERROR DETECTION AND CORRECTION WITH HAMMING CODE ALGORITHM

2017 ◽  
Author(s):  
Robbi Rahim
Keyword(s):  
Error Detection ◽  
Scientific Research ◽  
Hamming Code ◽  
Error Detection And Correction ◽  
Engineering And Technology ◽  
Code Algorithm

This paper has been published in International Journal of Scientific Research in Science, Engineering and Technology (IJSRSET) Volume 3 Issue 1 year of 2017

scholarly journals Low-overhead, one-cycle timing-error detection and correction technique for flip-flop based pipelines

2019 ◽  
Vol 16 (11) ◽  
pp. 20190180-20190180
Author(s):  
Jongeun Koo ◽  
Eunhyeok Park ◽  
Dongyoung Kim ◽  
Junki Park ◽  
Sungju Ryu ◽  
...  
Keyword(s):  
Error Detection ◽  
Timing Error ◽  
Flip Flop ◽  
Correction Technique ◽  
Error Detection And Correction

scholarly journals Lookup Table Algorithm for Error Correction in Color Images

2018 ◽  
Vol 2 (2) ◽  
pp. 63
Author(s):  
Ruaa Alaadeen Abdulsattar ◽  
Nada Hussein M. Ali
Keyword(s):  
Error Correction ◽  
Error Detection ◽  
Color Image ◽  
Color Images ◽  
Lookup Table ◽  
Hamming Code ◽  
Detection Techniques ◽  
Error Ratio ◽  
Error Detection And Correction ◽  
Large Burst

Error correction and error detection techniques are often used in wireless transmission systems. A color image of type BMP is considered as an application of developed lookup table algorithms to detect and correct errors in these images. Decimal Matrix Code (DMC) and Hamming code (HC) techniques were integrated to compose Hybrid Matrix Code (HMC) to maximize the error detection and correction. The results obtained from HMC still have some error not corrected because the redundant bits added by Hamming codes to the data are considered inadequate, and it is suitable when the error rate is low for detection and correction processes. Besides, a Hamming code could not detect large burst error period, in addition, the have same values sometimes which lead to not detect the error and consequently increase the error ratio. The proposed algorithm LUT_CORR is presented to detect and correct errors in color images over noisy channels, the proposed algorithm depends on the parallel Cyclic Redundancy Code (CRC) method that's based on two algorithms: Sarwate and slicing By N algorithms. The LUT-CORR and the aforementioned algorithms were merged to correct errors in color images, the output results correct the corrupted images with a 100 % ratio almost. The above high correction ratio due to some unique values that the LUT-CORR algorithm have. The HMC and the proposed algorithm applied to different BMP images, the obtained results from LUT-CORR are compared to HMC for both Mean Square Error (MSE) and correction ratio.  The outcome from the proposed algorithm shows a good performance and has a high correction ratio to retrieve the source BMP image.

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