Development of 4H–SiC Epitaxial Growth Technique Achieving High Growth Rate and Large-Area Uniformity

2008 ◽  
Vol 1 (1) ◽  
pp. 015001 ◽  
Author(s):  
Masahiko Ito ◽  
Liutauras Storasta ◽  
Hidekazu Tsuchida
2008 ◽  
Vol 600-603 ◽  
pp. 111-114 ◽  
Author(s):  
Masahiko Ito ◽  
L. Storasta ◽  
Hidekazu Tsuchida

A vertical hot-wall type epi-reactor that makes it possible to simultaneously achieve both a high rate of epitaxial growth and large-area uniformity at the same time has been developed. A maximum growth rate of 250 µm/h is achieved at 1650 °C. Thickness uniformity of 1.1 % and doping uniformity of 6.7 % for a 65 mm radius area are achieved while maintaining a high growth rate of 79 µm/h. We also succeeded in growing a 280 µm-thick epilayer with excellent surface morphology and long carrier lifetime of ~1 µs on average. The LTPL spectrum shows free exciton peaks as dominant, and few impurity-related or intrinsic defect related peaks are observed. The DLTS measurement for an epilayer grown at 80 µm/h shows low trap concentrations of 1.2×1012 cm-3 for Z1/2 center and 6.3×1011 cm-3 for EH6/7 center, respectively.


2000 ◽  
Vol 9 (9-10) ◽  
pp. 1673-1677 ◽  
Author(s):  
H. Guo ◽  
Z.L. Sun ◽  
Q.Y. He ◽  
S.M. Du ◽  
X.B. Wu ◽  
...  

2004 ◽  
Vol 815 ◽  
Author(s):  
H. Tsuchida ◽  
I. Kamata ◽  
S. Izumi ◽  
T. Tawara ◽  
T. Jikimoto ◽  
...  

AbstractGrowth technique for thick SiC epilayers with a reduced micropipe density has been developed in a vertical hot-wall CVD reactor. Micropipe closing by growing an epilayer is possible with a nearly 100% probability for 4H-SiC substrates oriented (0001) and (000-1) off-cut towards either [11-20] or [1-100]. By applying the micropipe closing technique, a high-performance Schottky barrier diode (SBD) was demonstrated on a substrate including micropipes. Growth of low-doped and thick SiC epilayers is also possible with a good morphology at a high growth rate, and 14.4 kV blocking performance was demonstrated using a 210 μm-thick epilayer. Epitaxial growth on (000-1) substrates with low doping and a low epi-induced defect density was also demonstrated. Deep centers and impurities were investigated to determine the effective lifetime killer of the epilayers. Dislocations and stacking faults in epilayers grown on 4H-SiC substrates off-cut towards different directions were also investigated.


2016 ◽  
Vol 858 ◽  
pp. 173-176 ◽  
Author(s):  
Hideyuki Uehigashi ◽  
Keisuke Fukada ◽  
Masahiko Ito ◽  
Isaho Kamata ◽  
Hiroaki Fujibayashi ◽  
...  

We have developed a single-wafer vertical epitaxial reactor which realizes high-throughput production of 4H-SiC epitaxial layer (epilayer) with a high growth rate [1,2]. In this paper, in order to evaluate the crystalline defects which can affect the characteristics of devices, we investigated the formation of variety of in-grown stacking faults (SFs) in detail. Synchrotron X-ray topography, photoluminescence (PL) and transmission electron microscopy are employed to analyze the SFs and the origins of the SF formation are discussed. The result in reducing in-grown SFs in fast epitaxial growth is also shown.


2007 ◽  
Vol 556-557 ◽  
pp. 157-160 ◽  
Author(s):  
Francesco La Via ◽  
Stefano Leone ◽  
Marco Mauceri ◽  
Giuseppe Pistone ◽  
Giuseppe Condorelli ◽  
...  

The growth rate of 4H-SiC epi layers has been increased by a factor 19 (up to 112 μm/h) with respect to the standard process with the introduction of HCl in the deposition chamber. The epitaxial layers grown with the addition of HCl have been characterized by electrical, optical and structural characterization methods. An optimized process without the addition of HCl is reported for comparison. The Schottky diodes, manufactured on the epitaxial layer grown with the addition of HCl at 1600 °C, have electrical characteristics comparable with the standard epitaxial process with the advantage of an epitaxial growth rate three times higher.


2020 ◽  
Vol 91 (7) ◽  
pp. 076105
Author(s):  
Zheng Bo ◽  
Mengxiang Su ◽  
Huachao Yang ◽  
Shiling Yang ◽  
Jianhua Yan ◽  
...  

2011 ◽  
Vol 316 (1) ◽  
pp. 60-66 ◽  
Author(s):  
Iftekhar Chowdhury ◽  
M.V.S. Chandrasekhar ◽  
Paul B. Klein ◽  
Joshua D. Caldwell ◽  
Tangali Sudarshan

Synthesiology ◽  
2016 ◽  
Vol 9 (3) ◽  
pp. 124-138 ◽  
Author(s):  
Masataka HASEGAWA ◽  
Kazuo TSUGAWA ◽  
Ryuichi KATO ◽  
Yoshinori KOGA ◽  
Masatou ISHIHARA ◽  
...  

2017 ◽  
Vol 897 ◽  
pp. 43-46 ◽  
Author(s):  
Kazukuni Hara ◽  
Hiroaki Fujibayashi ◽  
Yuuichi Takeuchi ◽  
Shoichiro Omae

In this work, we have developed a selective embedded epitaxial growth process on 150-mm-diameter wafer by vertical type hot wall CVD reactor with the aim to realize the all-epitaxial 4H-SiC MOSFETs [1, 2, 3, 4, 5]. We found that at elevated temperature and adding HCl, the epitaxial growth rate at the bottom of trench is greatly enhanced compare to growth on the mesa top. And we obtain high growth rate 7.6μm/h at trench bottom on 150mm-diameter-wafer uniformly with high speed rotation (1000rpm).


1990 ◽  
Vol 204 ◽  
Author(s):  
Junro Sakai ◽  
Ken-Ichi Aketagawa ◽  
Toru Tatsumi

ABSTRACTLow temperature and high growth rate selective epitaxial growth (SEG) on Si02 patterned Si (001) substrate in gas-source molecular-beam epitaxy (GS-MBE) using pure Si2H6 has been investigated by RHEED observation. In the temperature range of 550 to 850°C, SEG was completely obtained at an initial growth stage. Limiting conditions of SEG were closely related with critical volume of supply gas that was equal to the total amount molecules supplied on SiO2 surface during the incubation period of initial growth. The surface SiO2 was induced to evaporate with Si2H6 supplied above 800°C, so that thermal cleaning temperature for removing native oxide came down to 800°C. As a result, the maximum process temperature of Si SEG now became 800°C, and its growth rate reached as high as 645A/min at growth temperature of 700°C.


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