Si Nanowire CMOS Transistors and Circuits by Top-Down Technology Approach

2019 ◽  
Vol 13 (1) ◽  
pp. 201-211 ◽  
Author(s):  
Narayanan Balasubramanian ◽  
Navab Singh ◽  
Subhash C. Rustogi ◽  
Kavitha D. Buddharaju ◽  
J Fu ◽  
...  
Keyword(s):  
Top Down ◽  
Si Nanowire ◽  
Cmos Transistors

TID Effects in Highly Scaled Gate-All-Around Si Nanowire CMOS Transistors Irradiated to Ultra-High Doses

2022 ◽  
pp. 1-1
Author(s):  
Stefano Bonaldo ◽  
Mariia Gorchichko ◽  
En Xia Zhang ◽  
Teng Ma ◽  
Serena Mattiazzo ◽  
...  
Keyword(s):  
Si Nanowire ◽  
Cmos Transistors ◽  
High Doses

Si-nanowire CMOS inverter logic fabricated using gate-all-around (GAA) devices and top-down approach

2008 ◽  
Vol 52 (9) ◽  
pp. 1312-1317 ◽  
Author(s):  
K.D. Buddharaju ◽  
N. Singh ◽  
S.C. Rustagi ◽  
Selin H.G. Teo ◽  
G.Q. Lo ◽  
...  
Keyword(s):  
Top Down ◽  
Cmos Inverter ◽  
Si Nanowire

Si-Nanowire-Based Memristors Constructed Using Top-Down Methods for Flexible Electronic Systems

2011 ◽  
Author(s):  
T. Moon ◽  
J. Kang ◽  
Y. Han ◽  
C. Kim ◽  
Y. Jeon ◽  
...  
Keyword(s):  
Electronic Systems ◽  
Top Down ◽  
Si Nanowire ◽  
Flexible Electronic

A Study on the Electrical Characterization of Top-down Fabricated Si Nanowire ISFET

2013 ◽  
Vol 30 (1) ◽  
pp. 128-133
Author(s):  
Sungman Kim ◽  
Younghak Cho ◽  
Junhyung Lee ◽  
Jihyoung Rho ◽  
Daesung Lee
Keyword(s):  
Electrical Characterization ◽  
Top Down ◽  
Si Nanowire

Understanding the vapor–liquid–solid mechanism of Si nanowire growth and doping to synthetically encode precise nanoscale morphology

2016 ◽  
Vol 4 (18) ◽  
pp. 3890-3897 ◽  
Author(s):  
Christopher W. Pinion ◽  
Joseph D. Christesen ◽  
James F. Cahoon
Keyword(s):  
Semiconductor Industry ◽  
Semiconductor Nanostructures ◽  
Nanowire Growth ◽  
Top Down ◽  
Vapor Liquid Solid ◽  
Chemical Methods ◽  
Bottom Up ◽  
Si Nanowire ◽  
Vapor Liquid Solid Mechanism ◽  
Nanoscale Morphology

Bottom-up, chemical methods to control the morphology of semiconductor nanostructures are a promising complement to the top-down fabrication techniques that currently dominate the semiconductor industry.

High-Performance Si Nanowire Transistors on Fully Si Bulk Substrate From Top-Down Approach: Simulation and Fabrication

2010 ◽  
Vol 9 (1) ◽  
pp. 114-122 ◽  
Author(s):  
Jing Zhuge ◽  
Yu Tian ◽  
Runsheng Wang ◽  
Ru Huang ◽  
Yiqun Wang ◽  
...  
Keyword(s):  
High Performance ◽  
Top Down ◽  
Si Nanowire ◽  
Nanowire Transistors ◽  
Bulk Substrate

Si-Nanowire-Array-Based NOT-Logic Circuits Constructed on Plastic Substrates Using Top–Down Methods

2013 ◽  
Vol 13 (5) ◽  
pp. 3350-3353 ◽  
Author(s):  
Youngin Jeon ◽  
Jeongmin Kang ◽  
Myeongwon Lee ◽  
Taeho Moon ◽  
Sangsig Kim
Keyword(s):  
Nanowire Array ◽  
Logic Circuits ◽  
Top Down ◽  
Plastic Substrates ◽  
Si Nanowire ◽  
Si Nanowire Array
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