Si Nanowire CMOS Transistors and Circuits by Top-Down Technology
Approach
Si-nanowire CMOS inverter logic fabricated using gate-all-around (GAA) devices and top-down approach
2008 ◽
Vol 52
(9)
◽
pp. 1312-1317
◽
2013 ◽
Vol 30
(1)
◽
pp. 128-133
2016 ◽
Vol 4
(18)
◽
pp. 3890-3897
◽
2010 ◽
Vol 9
(1)
◽
pp. 114-122
◽