scholarly journals A study on performances of carrier-based pulse-width modulation techniques for three-phase three-level t-type neutral-point-clamped inverter under switch-open-circuit fault on two neutral-point-connected legs

2020 ◽  
Vol 3 (3) ◽  
pp. first
Author(s):  
Nhờ Văn NGUYỄN ◽  
HONG-PHONG NGUYEN LE
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Short Circuit ◽  
Harmonic Distortion ◽  
Open Circuit ◽  
Neutral Point ◽  
Voltage Source ◽  
Voltage Source Inverters ◽  
Critical Issues

Multilevel voltage source inverters (VSIs) have been used for several decades thanks to their advantages compared with traditional two level VSI. Among various types of multilevel configuration, the T-type neutral-point-clamped VSI (3L TNPC VSI or 333-type VSI) has gained the attention in recent years. Due to the unique structure, the 333-type VSI has critical issues in reliability in operation such as switch-open-circuit (SOC) and switch-short-circuit (SSC), which lead to several unrequired issues, for instance, reduction of system performance, distorted and unbalanced output voltages and currents, or triggering the protection circuits. In some applications, the amplitude reduction and harmonics distortion of output voltages in SOC faults are not acceptable. Therefore, it is necessary to develop a pulse-width modulation (PWM) algorithm for 333-type VSI working under SOC fault which guarantees the desired output fundamental component voltage. The simultaneous SOC fault on two neutral-point-connected legs in the 333-type VSI may cause a large reduction in the output voltage. Under this circumstance, the 333-type VSI becomes an asymmetrical one called 322-type VSI. Certain studies regarding to the operation of 333-type VSI under SOC faults have been carried out. However, these studies require more semiconductor devices in order to create a redundant switching circuit. This leads to higher system cost with reduced inverter effieciency due to the additional loss. In this study, two carrier-based pulse-width modulation (CBPWM) techniques, i.e. 322-sinusoidal PWM (322-SPWM) and 322-medium offset CBPWM (322-MOCBPWM) are proposed for 322-type VSI. The proposed techniques are firstly simulated in MATLAB/Simulink and then implemented on a hardware setup. Performances of the proposed techniques are evaluated in terms of total harmonic distortion (THD) and weighted-THD (WTHD) of output voltages. Simulation results show that considering the worst output voltage under SOC fault, vBC, the proposed 322-SPWM technique could improve the THD by 40% and the WTHD by 94% compared with the uncompensated case with m=0.8. The corresponding results of 322-MOCBPWM technique are 42% and 96%, respectively. Characteristics of THD and WTHD values are also presented for demonstration the effectiveness of the proposed algorithm.

scholarly journals Caracterización del método SVPWM con inversor trifásico de dos niveles

2019 ◽  
pp. 22-29
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Input Voltage ◽  
Good Choice ◽  
Voltage Source ◽  
Voltage Source Inverter ◽  
Matlab Simulink ◽  
Wide Range

Caracterización del método SVPWM con inversor trifásico de dos niveles Juan Tisza1, 2, Javier Villegas2 1Universidad Nacional de Ingeniería, Av. Túpac Amaru 210, Rímac, Lima Perú 2Universidad Nacional Mayor de San Marcos, Ciudad Universitaria, Lima, Perú Recibido 17 de junio del 2019, Revisado el 17 de julio de 2019 Aceptado el 19 de julio de 2019 DOI: https://doi.org/10.33017/RevECIPeru2019.0005/ Resumen Las cargas en Corriente Alterna (CA) requieren voltaje variable y frecuencia variable. Estos requisitos se cumplen con un inversor de fuente de voltaje (VSI). Se puede lograr un voltaje de salida variable variando la tensión de CC de entrada y manteniendo constante la ganancia del inversor. Por otro lado, si la tensión de entrada CC es fija y no es controlable, se puede lograr una tensión de salida variable variando la ganancia del inversor, lo que normalmente se logra mediante el control de modulación por ancho de pulso dentro del inversor. Hay varias técnicas de modulación de ancho de pulso, pero la técnica de vector espacial es una buena opción entre todas las técnicas para controlar el inversor de fuente de voltaje. La modulación por ancho de pulso de vector espacial (SVPWM) es un método avanzado y muy popular con varias ventajas tales como la utilización efectiva del bus de CC, menos generación de armónicos en voltaje de salida, menos pérdidas de conmutación, amplio rango de modulación lineal, etc. En este documento, se ha tomado un inversor de fuente de voltaje constante CC y se ha implementado la SVPWM para VSI de dos niveles utilizando MATLAB / SIMULINK. Descriptores: Modulación de ancho de pulso (PWM), modulación de ancho de pulso de vector espacial (SVPWM), distorsión armónica total (THD), inversor de fuente de voltaje (VSI). Abstract Alternating Current (AC) loads require variable voltage and variable frequency. These requirements are met by a voltage supply inverter (VSI). A variable output voltage can be achieved by varying the input DC voltage and keeping the inverter gain constant. On the other hand, if the DC input voltage is fixed and not controllable, a variable output voltage can be achieved by varying the gain of the inverter, which is normally achieved by controlling the pulse width modulation within the inverter. There are several pulse width modulation techniques, but the spatial vector technique is a good choice among all the techniques for controlling the voltage source inverter. Spatial vector pulse width modulation (SVPWM) is an advanced and very popular method with several advantages such as effective utilization of CC bus, less harmonic generation in output voltage, less switching losses, wide range of linear modulation, etc. In this document, a CC constant voltage source inverter has been taken and SVPWM has been implemented for two-level VSI using MATLAB / SIMULINK. Keywords: Pulse Width Modulation (PWM), Space Vector Pulse Width Modulation (SVPWM), Total Harmonic Distortion (THD), Voltage Source Inverter (VSI).

scholarly journals FPGA Techniques Based New Hybrid Modulation Strategies for Voltage Source Inverters

2015 ◽  
Vol 2015 ◽  
pp. 1-6 ◽  
Author(s):  
L. U. Sudha ◽  
J. Baskaran ◽  
S. A. Elankurisil
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Performance Criterion ◽  
Voltage Source ◽  
Voltage Source Inverters ◽  
Hybrid Modulation ◽  
Switching Losses ◽  
Harmonic Pollution ◽  
Modulation Methods

This paper corroborates three different hybrid modulation strategies suitable for single-phase voltage source inverter. The proposed method is formulated using fundamental switching and carrier based pulse width modulation methods. The main tale of this proposed method is to optimize a specific performance criterion, such as minimization of the total harmonic distortion (THD), lower order harmonics, switching losses, and heat losses. The proposed method is articulated using fundamental switching and carrier based pulse width modulation methods. Thus, the harmonic pollution in the power system will be reduced and the power quality will be augmented with better harmonic profile for a target fundamental output voltage. The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor. The feasibility of these modulation strategies is authenticated through simulation and experimental results.

scholarly journals A Novel Zero Dead-Time PWM Method to Improve the Current Distortion of a Three-Level NPC Inverter

Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2195
Author(s):  
Jin-Wook Kang ◽  
Seung-Wook Hyun ◽  
Yong Kan ◽  
Hoon Lee ◽  
Jung-Hyo Lee
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Dead Time ◽  
Short Circuit ◽  
Reference Voltage ◽  
Voltage Source ◽  
Switching Operation ◽  
Voltage Unbalance ◽  
Offset Voltage ◽  
Simulation And Experiment

This paper proposes a novel pulse width modulation (PWM) for a three-level neutral point clamped (NPC) voltage source inverter (VSI). When the conventional PWM method is used in three-level NPC VSI, dead time is required to prevent a short circuit caused by the operation of complementary devices on the upper and lower arms. However, current distortion is increased because of the dead time and it can also cause a voltage unbalance in the dc-link. To solve this problem, we propose a zero dead-time width modulation (ZDPWM) which does not require dead time used in complementary operation. The proposed technique applies the offset voltage to the space vector pulse width modulation (SVPWM) reference voltage for the same modulation index (MI) as the conventional SVPWM, but any complementary switching operation needs dead time. In addition, the proposed method is divided into four operation sections using the reference voltage and phase current to operate switching devices which flow the current depending on the section. This ZDPWM method is simply implemented by carrier and reference voltage that reduce the current distortion, because complementary operation that needs dead time is not implemented. However, the operation section is delayed due to the sampling delay that occurs during the experiment. Therefore, in this paper, we conduct a modeling of sampling delay to improve the delay of operation section. To verify the principle and feasibility of the proposed ZDPWM method, a simulation and experiment are implemented.

Synchronized Symmetrical Bus-Clamping PWM Strategies for Three Level Inverter: Applications to Low Switching Frequencies

2011 ◽  
Vol 12 (2) ◽  
Author(s):  
Sreenivasappa Bhupasandra Veeranna ◽  
Udaykumar R Yaragatti ◽  
Abdul R Beig
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
High Performance ◽  
Pulse Width Modulation ◽  
Industrial Applications ◽  
Voltage Source ◽  
Switching Frequency ◽  
Space Vector ◽  
Digital Implementation ◽  
Switching Losses

The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter.

scholarly journals Algorithim to control output voltage and reduce the ripple of input current in quasi switched boost inverter

2021 ◽  
Vol 4 (2) ◽  
pp. first
Author(s):  
Xuan-Vinh Le ◽  
Duc-Minh Nguyen ◽  
Viet-Anh Truong ◽  
Thanh-Hai Quach
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Short Circuit ◽  
Modulation Index ◽  
Duty Ratio ◽  
Electrical Systems ◽  
Boost Factor ◽  
Control Output ◽  
Current Ripple

In recent years, the quasi -switched boost inverter uses widely in electrical systems. This paper proposes a method to control the AC output voltage and reduce the current ripple of the booster inductor in the quasi-switched boost inverter (QSBI). The proposed technique base on carrier pulse width modulation with two triangles with phase shifts 90◦. This technique uses the offset function to expand the modulation index and the algorithm for output voltage stabilization based on the adjustment of the boost ratio. The modulation index expansion will reduce the stress voltage on the switches by an average of 16.5% under the simulated conditions. The boost factor base on the short circuit time on the DC / DC booster and the inverter on the zero vectors. So, the duty ratio (of the boost DC / DC) can reduce by the short-circuit pulses that insert in the position of zero vectors, so the inverter is responsible for both boosting and inverting. The combination helps to reduce the current ripple on the boost inductor. Besides that, reducing the short-circuit ratio of DC / DC booster will also reduce the capacity of the booster switch and thereby reduce the production cost. The analysis clarifies the proposed technique. Simulations and experiments evaluate the proposed method.

Carrier-Based PWM Technique for Inverter-Fed Multiphase Induction Motor 

2016 ◽  
Vol 6 (5) ◽  
pp. 1967
Author(s):  
Jyothi B ◽  
M.Venugopala Rao
Keyword(s):  
Induction Motor ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Voltage Source ◽  
Matlab Software ◽  
Third Harmonic ◽  
Voltage Source Inverters ◽  
Three Phase ◽  
Simulation Results ◽  
Multiphase Machine

<p>Multiphase (more than three phases) is very much popular due to their eminent features compared to conventional three-phase counter parts. In order to drive the multiphase machine, it requires same phase input w.r.t the no of phases at the output. This paper mainly focuses on five phase, because even after failure of one phase, the performance does not degraded much. Voltage source inverters (VSIs) are used to feed the induction motor. voltage source inverters (VSIs) switches are ON and OFF precisely to control the output. In order to implement harmonic waveform characteristic, carrier based PWM (pulse width modulation) is performed. By using with and without third harmonic injection machine torque is highly improved. Using MATLAB software, the simulation results are presented in the form of computer traces and high traded performance of the machine are discussed.</p>

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