Hardware Implementation of Cascaded Hybrid Multilevel Inverter with Reduced Number of Switches

Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi ◽  
R. Bensaraj

<p class="JESTECAbstract">This paper presents the comparison of various multicarrier Pulse Width Modulation (PWM) techniques for the Cascaded Hybrid Multi Level Inverter (CHBMLI). Due to switch combination redundancies, there are certain degrees of freedom to generate the five level AC output voltage. This paper presents the use of Control Freedom Degree (CFD) combination. The effectiveness of the PWM strategies developed using CFD are demonstrated by simulation and experimentation.  The simulation results indicate that the chosen five level inverter triggered by the developed Phase Disposition(PD), Phase Opposition and Disposition(POD), Alternate Phase Opposition and Disposition (APOD), Carrier Overlapping (CO), Phase Shift (PS) and Variable Frequency (VF)<strong> </strong>PWM strategies developed are implemented in real time using FPGA. The simulation and experimental outputs closely match with each other validating the strategies presented.</p>

Author(s):  
A. Shamsul Rahimi A. Subki ◽  
Mohd Zaidi Mohd Tumari ◽  
Wan Norhisyam Abd Rashid ◽  
Aiman Zakwan Jidin ◽  
Ahmad Nizammuddin Muhammad Mustafa

<span lang="EN-US">In this paper a hardware implementation of single-phase cascaded H-bridge three level multilevel inverter (MLI) using sinusoidal pulse width modulation (SPWM) is presented. There are a few interesting features of using this configuration, where less component count, less switching losses, and improved output voltage/current waveform. The output of power inverter consists of three form, that is, square wave, modified square wave and pure sine wave. The pure sine wave and modified square wave are more expensive than square wave. The focus paper is to generate a PWM signal which control the switching of MOSFET power semiconductor. The sine wave can be created by using the concept of Schmitt-Trigger oscillator and low-pass filter topology followed by half of the waveform will be eliminated by using the circuit of precision half-wave rectifier. Waveform was inverted with 180º by circuit of inverting op-amp amplifier in order to compare saw-tooth waveform. Two of PWM signal were produced by circuit of PWM and used digital inverter to invert the two PWM signal before this PWM signal will be passed to 2 MOSFET driver and a 3-level output waveform with 45 Hz was produced. As a conclusion, a 3-level output waveform is produced with output voltage and current recorded at 22.5 Vrms and 4.5 Arms. The value of measured resistance is 0.015 Ω that cause voltage drop around 0.043 V. Based on the result obtained, the power for designed inverter is around 100W and efficiency recorded at 75%.</span>


Author(s):  
Hashim Hasabelrasul ◽  
Xiangwu Yan

<p>One of the preferred choices of electronic power conversion for high power applications are multilevel inverters topologies finding increased attention in industry. Cascaded H-Bridge multilevel inverter is one of these topologies reaching the higher output voltage, power level and higher reliability due to its modular topology. Level Shifted Carrier Pulse Width Modulation (LSCPWM) and Phase Shifted Carrier Pulse Width Modulation are used generally for switching cascaded H-bridge (CHB) multilevel inverters. This paper compares LSCPWM and PSCPWM in terms of total harmonics distortion (THD) and output voltage among inverter cells. Simulation for 21-level CHB inverter is carried out in MATLAB/SIMULINK and simulation results are presented.</p>


Author(s):  
Periyaazhagar D ◽  
Irusapparajan G

In this paer, the suggested topologies are gained by cascading a full bridge inverter with dissimilar DC sources. This topology has a several new patterns adopting the fixed switching frequency, multicarrier control freedom degree with mixture conceptions are established and simulated for the preferred three-phase cascaded multilevel inverter. In outstanding switching arrangement terminations, there are convinced degrees of freedom to produce the nine level AC output voltages with terminated switching positions for producing altered output voltages. These investigations focus on asymmetrical cascaded multilevel inverter engaging with carrier overlapping pulse width modulation (PWM) topologies. These topologies offer less amount of harmonics present in the output voltage and superior root mean square (RMS) values of the output voltages associated with the traditional sinusoidal pulse width modulation. This research studies carries with it MATLAB/SIMULINK based simulation and experimental results obtained using appropriated prototype to prove the validity of the proposed concept.


2021 ◽  
Vol 17 (1) ◽  
pp. 1-13
Author(s):  
Adala Abdali ◽  
Ali Abdulabbas ◽  
Habeeb Nekad

The multilevel inverter is attracting the specialist in medium and high voltage applications, among its types, the cascade H bridge Multi-Level Inverter (MLI), commonly used for high power and high voltage applications. The main advantage of the conventional cascade (MLI) is generated a large number of output voltage levels but it demands a large number of components that produce complexity in the control circuit, and high cost. Along these lines, this paper presents a brief about the non-conventional cascade multilevel topologies that can produce a high number of output voltage levels with the least components. The non-conventional cascade (MLI) in this paper was built to reduce the number of switches, simplify the circuit configuration, uncomplicated control, and minimize the system cost. Besides, it reduces THD and increases efficiency. Two topologies of non-conventional cascade MLI three phase, the Nine level and Seventeen level are presented. The PWM technique is used to control the switches. The simulation results show a better performance for both topologies. THD, the power loss and the efficiency of the two topologies are calculated and drawn to the different values of the Modulation index (ma).


This paper deals with sensorless vector controlled induction motor in which torque pulsations are reduced with improved input of induction motor. In proposed technique two multi winding transformers are used for generation of 18 sinusoidal signals given to rectifier unit and the rectifier output given as input to 9 level multi level inverter. In this proposed technique gating signals to the inverter switches will be provided through space vector pulse width modulation which considers speed as reference. This configuration was simulated in MATLAB/Simulink.and the simulation results are presented here with improvement in reduction of THD.


2020 ◽  
Vol 8 (5) ◽  
pp. 5180-5185

Paper Setup must be in A4 size with Margin: Top In the present paper multi carrier sinusoidal modulation technique which is an efficient method of producing control signals is used for a symmetrical inverter with several levels in cascade H Bridge is discussed. The Cascaded H-Bridge performance output levels depend on the DC voltage sources used at the input side. With the help of two DC voltage sources, five level output can be obtained whereas three sources gives levels of seven in output voltage. In this paper, multi-carrier SPWM switching is obtained for switching of multilevel inverter based switches. Two signals are used in this switching method, among which one of the signals is reference which is a low frequency sinusoidal signal and the one is a carrier signal. In case of sinusoidal PWM method of modulation technique, the reference signal is a sinusoidal one and triangular signal can be used as a carrier signal. These types of inverters have the ability to generate inverted output voltage with an efficient harmonic spectrum and reliable output results. This document provides switching signal for H-bridge inverter structure which can improve harmonic performance. The 5-level multilevel inverter is simulated for traditional carrier-based pulse-width modulation (PWM) phase change carrier techniques. The total harmonic performance of the output voltages is analyzed for the two PWM control methods. The performance of the symmetrical PWM CHB is simulated using MATLAB-SIMULINK model. Model results show that THD can be minimized to a limit with level shifted modulation method of the sinusoidal pulse width. The results from the simulations show that the quality of the waveform of the output voltage improves with less loss and with a lower THD.


Author(s):  
Mr.A.VinothKumar ◽  
Dr.S.Vijayabaskar ◽  
Ms.C.Selsiya

The demand for clean and sustainable energy has prompted research into all types of renewable energy sources, including solar energy generated by photovoltaic systems. We suggest a new multi level inverter topology in this paper. This paper looks at a PV-based 13-level multi level inverter with fewer switches. The most gainful power converters for high power applications and modern applications with fewer switches are multi level inverters. PWM methodology is used to manage the proposed topology. The proposed topology has one of the highest efficiency and lower voltage THD. The inverter produces output voltage in thirteen levels: Vdc, Vdc/2, Vdc/3, Vdc/4, Vdc/5, Vdc/6, 0, -Vdc, -Vdc/2, -Vdc/3, -Vdc/4, -Vdc/5 and -Vdc/6. The validity of the proposed inverter is verified through simulation. KEY WORDS: Pulse Width modulation (PWM), Photo Voltaic (PV) Source.


2022 ◽  
Vol 4 (1) ◽  
pp. 1-13
Author(s):  
Madhu Andela ◽  
Ahmmadhussain Shaik ◽  
Saicharan Beemagoni ◽  
Vishal Kurimilla ◽  
Rajagopal Veramalla ◽  
...  

This paper deals with a reduced switch multi-level inverter for the solar photovoltaic system-based 127-level multi-level inverter. The proposed technique uses the minimum number of switches to achieve the maximum steps in staircase AC output voltage when compared to the flying capacitor multi-level inverter, cascaded type multilevel inverter and diode clamped multi-level inverter. The use of a minimum number of switches decreases the cost of the system. To eliminate the switching losses, in this topology a square wave switch is used instead of pulse width modulation. Thereby the total harmonic distortion (THD) and harmonics have been reduced in the pulsating AC output voltage waveform. The performance of 127-level MLI is compared with 15 level, 31-level and 63-level multilevel inverters. The outcomes of the solar photovoltaic system-based 127-level multi-level inverter have been simulated in a MATLAB R2009b environment.


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