Deposition and characterization of HfO2 high k dielectric films

2004 ◽  
Vol 19 (6) ◽  
pp. 1775-1782 ◽  
Author(s):  
Wai Lo ◽  
Arvind Kamath ◽  
Shreyas Kher ◽  
Craig Metzner ◽  
Jianguo Wen ◽  
...  
Keyword(s):  
Gate Dielectrics ◽  
Chemical Vapor ◽  
Complementary Metal Oxide Semiconductor ◽  
Deposition Process ◽  
Dielectric Materials ◽  
Growth Conditions ◽  
Oxide Semiconductor ◽  
Dielectric Films ◽  
Equivalent Thickness ◽  
Vapor Deposition Technique

As the scaling of complementary metal-oxide-semiconductor (CMOS) transistors proceeds, the thickness of the SiO2 gate dielectrics shrinks rapidly and results in higher gate leakage currents. High k dielectric materials are acknowledged to be the possible solutions to this challenge, as their higher k values (e.g., 15–50) raise the physical thickness of the dielectrics that provide similar equivalent thickness of a thinner SiO2 film. In order for the high k materials to be applicable in CMOS devices, there should exist deposition technologies that can deposit highly uniform films over Si wafers with diameters as large as 200 mm. This report discusses the deposition process and the correlation between the growth conditions, structural and dielectric properties of HfO2, which is one of the most promising high k dielectric materials. Judging from the thickness uniformity, surface roughness, k value, and interfacial density of state of the HfO2 films, the metalorganic chemical vapor deposition technique was identified to be suitable for growing HfO2 films targeted at applications as CMOS gate dielectrics.

scholarly journals A New Approach to the Fabrication of Memristive Neuromorphic Devices: Compositionally Graded Films

Materials ◽  
2020 ◽  
Vol 13 (17) ◽  
pp. 3680
Author(s):  
Jong-Gul Yoon
Keyword(s):  
Short Term Memory ◽  
Chemical Vapor ◽  
Complementary Metal Oxide Semiconductor ◽  
Information Storage ◽  
Oxide Semiconductor ◽  
Film Electrode ◽  
Retention Performance ◽  
Short Term ◽  
Neuromorphic Computing ◽  
Term Memory

Energy-efficient computing paradigms beyond conventional von-Neumann architecture, such as neuromorphic computing, require novel devices that enable information storage at nanoscale in an analogue way and in-memory computing. Memristive devices with long-/short-term synaptic plasticity are expected to provide a more capable neuromorphic system compared to traditional Si-based complementary metal-oxide-semiconductor circuits. Here, compositionally graded oxide films of Al-doped MgxZn1−xO (g-Al:MgZnO) are studied to fabricate a memristive device, in which the composition of the film changes continuously through the film thickness. Compositional grading in the films should give rise to asymmetry of Schottky barrier heights at the film-electrode interfaces. The g-Al:MgZnO films are grown by using aerosol-assisted chemical vapor deposition. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the films show self-rectifying memristive behaviors which are dependent on maximum applied voltage and repeated application of electrical pulses. Endurance and retention performance tests of the device show stable bipolar resistance switching (BRS) with a short-term memory effect. The short-term memory effects are ascribed to the thermally activated release of the trapped electrons near/at the g-Al:MgZnO film-electrode interface of the device. The volatile resistive switching can be used as a potential selector device in a crossbar memory array and a short-term synapse in neuromorphic computing.

scholarly journals Исследование нелегированных нанокристаллических алмазных пленок, выращенных из газовой фазы в плазме СВЧ разряда

2021 ◽  
Vol 55 (1) ◽  
pp. 49
Author(s):  
А.Л. Вихарев ◽  
С.А. Богданов ◽  
Н.М. Овечкин ◽  
О.А. Иванов ◽  
Д.Б. Радищев ◽  
...  
Keyword(s):  
High Temperature ◽  
Vapor Deposition ◽  
Microwave Plasma ◽  
Chemical Vapor ◽  
Growth Conditions ◽  
Inert Gas ◽  
Dielectric Films ◽  
High Temperature Annealing ◽  
Structural And Electrical Properties ◽  
Methane Mixture

Undoped nanocrystalline diamond (NCD) films less than 1 μm thick grown on Si (100) silicon by microwave plasma-assisted chemical vapor deposition at a frequency of 2.45 GHz are studied. To obtain diamond dielectric films with maximum resistivity the deposition of films in three gas mixtures is investigated: hydrogen-methane mixture, hydrogen-methane mixture with the addition of oxygen and hydrogen-methane mixture with the addition of an inert gas. A relationship has been established between the growth conditions, structural and electrical properties of NCD films. It is shown that for the use of NCD films as effective dielectrics preliminary high-temperature annealing of the films is required, for example, in vacuum at a temperature of 600°C for one hour.

Ambipolar Thin-Film Transistors Fabricated by PECVD Nanocrystalline Silicon

2006 ◽  
Vol 910 ◽  
Author(s):  
Czang-Ho Lee ◽  
Andrei Sazonov ◽  
Mohammad R. E. Rad ◽  
G. Reza Chaji ◽  
Arokia Nathan
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Field Effect ◽  
Chemical Vapor ◽  
Hole Mobility ◽  
Complementary Metal Oxide Semiconductor ◽  
Nanocrystalline Silicon ◽  
Oxide Semiconductor ◽  
Hole Injection ◽  
Current Ratio

AbstractWe report on directly deposited plasma-enhanced chemical vapor deposition (PECVD) nanocrystalline silicon (nc-Si:H) ambipolar thin-film transistors (TFTs) fabricated at 260 °C. The ambipolar operation is achieved adopting Cr metal contacts with high-quality nc-Si:H channel layer, which creates highly conductive Cr silicided drain/source contacts, reducing both electron and hole injection barriers. The n-channel nc-Si:H TFTs show a field-effect electron mobility (meFE) of 150 cm2/Vs, threshold voltage (VT) ~ 2 V, subthreshold slope (S) ~0.3 V/dec, and ON/OFF current ratio of more than 107, while the p-channel nc-Si:H TFTs show a field-effect hole mobility (mhFE) of 26 cm2/Vs, VT ~ -3.8 V, S ~0.25 V/dec, and ON/OFF current ratio of more than 106. Complementary metal-oxide-semiconductor (CMOS) logic integrated with two ambipolar nc-Si:H TFTs shows reasonable transfer characteristics. The results presented here demonstrate that low-temperature nc-Si:H TFT technology is feasible for total integration of active-matrix TFT backplanes.

Coherent island formation of Cu2O films grown by chemical vapor deposition on MgO(110)

2001 ◽  
Vol 16 (8) ◽  
pp. 2408-2414 ◽  
Author(s):  
P. R. Markworth ◽  
X. Liu ◽  
J. Y. Dai ◽  
W. Fan ◽  
T. J. Marks ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Strain Relaxation ◽  
Three Dimensional ◽  
High Mobility ◽  
Chemical Vapor ◽  
Deposition Process ◽  
Growth Conditions ◽  
Island Formation ◽  
Transmission Electron

Cuprous oxide (Cu2O) films have been grown on single-crystal MgO(110) substrates by a chemical vapor deposition process in the temperature range 690–790 °C. X-ray diffraction measurements show that phase-pure, highly oriented Cu2O films form at these temperatures. The Cu2O films are observed to grow by an island-formation mechanism on this substrate. Films grown at 690 °C uniformly coat the substrate except for micropores between grains. However, at a growth temperature of 790 °C, an isolated, three-dimensional island morphology develops. Using a transmission electron microscopy and atomic force microscope, both dome- and hut-shaped islands are observed and are shown to be coherent and epitaxial. The isolated, coherent islands form under high mobility growth conditions where geometric strain relaxation occurs before misfit dislocation can be introduced. This rare observation for oxides is attributed to the relatively weak bonding of Cu2O, which also has a relatively low melting temperature.

The Oxide/Nitride Interface: a study for gate dielectrics and field passivation

2003 ◽  
Vol 786 ◽  
Author(s):  
B.P. Gila ◽  
B. Luo ◽  
J. Kim ◽  
R. Mehandru ◽  
J.R. LaRoche ◽  
...  
Keyword(s):  
Gate Dielectrics ◽  
Substrate Surface ◽  
Surface Preparation ◽  
Dielectric Materials ◽  
Ex Situ ◽  
Dielectric Films ◽  
Interface Quality ◽  
Gas Source ◽  
Gas Source Mbe

ABSTRACTThe study of the effects of substrate surface preparation of GaN, both in-situ and ex-situ and the subsequent deposition of dielectric materials is necessary to create a viable GaN FET technology. Surface preparation techniques have been explored using RHEED, AES, SIMS and C-V measurements to produce films of low interface trap density, 1–2E11 eV−1cm−2. A similar study of the as-fabricated HEMT surface was carried out to create a cleaning procedure prior to dielectric passivation. Dielectric films of Sc2O3 and MgO were deposited via gas-source MBE. Post-deposition materials characterization included AES, TEM, XRR and XPS, as well as gate pulse and isolation current measurements for the passivated HEMT devices. From this study, the relationship between the interface structure and chemistry and the quality of the oxide/nitride electrical interface has been determined. The resulting process has led to the near elimination of the current collapse phenomenon. In addition, the resulting oxide/nitride interface quality has allowed for the first demonstration of inversion in GaN.

On the Electrical Characterization of High-ĸ Dielectrics

MRS Bulletin ◽  
2002 ◽  
Vol 27 (3) ◽  
pp. 222-225 ◽  
Author(s):  
R. Degraeve ◽  
E. Cartier ◽  
T. Kauerauf ◽  
R. Carter ◽  
L. Pantisano ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Electrode Materials ◽  
Gate Dielectric ◽  
Electrical Characterization ◽  
Complementary Metal Oxide Semiconductor ◽  
Dielectric Materials ◽  
Oxide Semiconductor ◽  
High Q ◽  
New Si

AbstractThe continual scaling of complementary metal oxide semiconductor (CMOS) technologies has pushed the Si-SiO2 system to its very limits and has led to the consideration of a number of alternative high-ĸ gate dielectric materials. In the end, it will be the electrical properties of the new Si/high-ĸ system that will determine its usefulness in future CMOS generations. For this reason, the study of the electrical properties of high-ĸ gate insulators is crucial. We present an overview of some of the electrical characterization techniques and reliability tests used to evaluate possible high-ĸ gate materials. Most of these techniques are well known from the characterization of SiO2 layers, but there are some additional complications, such as the presence of several different layers within one gate stack or the use of different gate electrode materials. These make the interpretation and comparison of experimental results more troublesome.

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