RF Power Performance Evaluation of Surface Channel Diamond MESFET

2009 ◽  
Vol 1203 ◽  
Author(s):  
Maria Cristina Rossi ◽  
Paolo Calvani ◽  
Gennaro Conte ◽  
Vittorio Camarchia ◽  
Federica Cappelluti ◽  
...  
Keyword(s):  
Output Power ◽  
Threshold Voltage ◽  
Polycrystalline Diamond ◽  
Drain Current ◽  
Rf Power ◽  
Power Performance ◽  
Power Devices ◽  
Large Signal ◽  
Device Structure ◽  
Power Added Efficiency

AbstractLarge-signal radiofrequency performances of surface channel diamond MESFET fabricated on hydrogenated polycrystalline diamond are investigated. The adopted device structure is a typical coplanar two-finger gate layout, characterized in DC by an accumulation-like behavior with threshold voltage Vt ∼ 0-0.5 V and maximum DC drain current of 120 mA/mm. The best radiofrequency performances (in terms of fT and fmax) were obtained close to the threshold voltage. Realized devices are analyzed in standard class A operation, at an operating frequency of 2 GHz. The MESFET devices show a linear power gain of 8 dB and approximately 0.2 Wmm RF output power with 22% power added efficiency. An output power density of about 0.8 W/mm can be then extrapolated at 1 GHz, showing the potential of surface channel MESFET technology on polycrystalline diamond for microwave power devices.

Silicon Carbide And Gallium Nitride Rf Power Devices

1997 ◽  
Vol 483 ◽  
Author(s):  
C. E. Weitzel ◽  
K. E. Moore
Keyword(s):  
Silicon Carbide ◽  
Gallium Nitride ◽  
Output Power ◽  
Wide Bandgap ◽  
Rf Power ◽  
Power Performance ◽  
Power Devices ◽  
Power Module ◽  
Wide Bandgap Semiconductor ◽  
Power Densities

AbstractImpressive RF power performance has been demonstrated by three radically different wide bandgap semiconductor power devices, SiC MESFET's, SiC SIT's, and AlGaN HFET's. AlGaN HFET's have achieved the highest fmax 97 GHz. 4H-SiC MESFET's have achieved the highest power densities, 3.3 W/mm at 850 MHz (CW) and at 10 GHz (pulsed). 4H-SiC SIT's have achieved the highest output power, 450 W (pulsed) at 600 MHz and 38 W (pulsed) at 3 GHz. Moreover a one kilowatt, 600 MHz SiC power module containing four multi-cell SIT's with a total source periphery of 94.5 cm has been demonstrated.

AlGaN/GaN epitaxy and technology

2010 ◽  
Vol 2 (1) ◽  
pp. 3-11 ◽  
Author(s):  
Patrick Waltereit ◽  
Wolfgang Bronner ◽  
Rüdiger Quay ◽  
Michael Dammann ◽  
Rudolf Kiefer ◽  
...  
Keyword(s):  
Output Power ◽  
Supply Voltage ◽  
Drain Current ◽  
High Electron Mobility Transistors ◽  
Base Station ◽  
High Electron ◽  
Power Performance ◽  
Power Added Efficiency ◽  
Electron Mobility Transistors ◽  
Conversion Efficiencies

We present an overview on epitaxial growth, processing technology, device performance, and reliability of our GaN high electron mobility transistors (HEMTs) manufactured on 3- and 4-in. SiC substrates. Epitaxy and processing are optimized for both performance and reliability. We use three different gate lengths, namely 500 nm for 1–6 GHz applications, 250 nm for devices between 6 and 18 GHz, and 150 nm for higher frequencies. The developed HEMTs demonstrate excellent high-voltage stability, high power performance, and large DC to RF conversion efficiencies for all gate lengths. On large gate width devices for base station applications, an output power beyond 125 W is achieved with a power added efficiency around 60% and a linear gain around 16 dB. Reliability is tested both under DC and RF conditions with supply voltage of 50 and 30 V for 500 and 250 nm gates, respectively. DC tests on HEMT devices return a drain current change of just about 10% under IDQ conditions. Under RF stress the observed change in output power density is below 0.2 dB after more than 1000 h for both gate length technologies.

Optimization of InP DHBT stacked-transistors for millimeter-wave power amplifiers

2018 ◽  
Vol 10 (9) ◽  
pp. 999-1010 ◽  
Author(s):  
Michele Squartecchia ◽  
Tom K. Johansen ◽  
Jean-Yves Dupuy ◽  
Virginio Midili ◽  
Virginie Nodjiadjim ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Output Power ◽  
Heterojunction Bipolar Transistors ◽  
Power Amplifiers ◽  
Small Signal Gain ◽  
Small Signal ◽  
Large Signal ◽  
Signal Gain ◽  
Power Added Efficiency ◽  
Saturated Output Power

AbstractIn this paper, we report the analysis, design, and implementation of stacked transistors for power amplifiers realized on InP Double Heterojunction Bipolar Transistors (DHBTs) technology. A theoretical analysis based on the interstage matching between all the single transistors has been developed starting from the small-signal equivalent circuit. The analysis has been extended by including large-signal effects and layout-related limitations. An evaluation of the maximum number of transistors for positive incremental power and gain is also carried out. To validate the analysis, E-band three- and four-stacked InP DHBT matched power cells have been realized for the first time as monolithic microwave integrated circuits (MMICs). For the three-stacked transistor, a small-signal gain of 8.3 dB, a saturated output power of 15 dBm, and a peak power added efficiency (PAE) of 5.2% have been obtained at 81 GHz. At the same frequency, the four-stacked transistor achieves a small-signal gain of 11.5 dB, a saturated output power of 14.9 dBm and a peak PAE of 3.8%. A four-way combined three-stacked MMIC power amplifier has been implemented as well. It exhibits a linear gain of 8.1 dB, a saturated output power higher than 18 dBm, and a PAE higher than 3% at 84 GHz.

scholarly journals An Improved UU-MESFET with High Power Added Efficiency

Micromachines ◽  
2018 ◽  
Vol 9 (11) ◽  
pp. 573 ◽  
Author(s):  
Hujun Jia ◽  
Mei Hu ◽  
Shunwei Zhu
Keyword(s):  
Breakdown Voltage ◽  
Threshold Voltage ◽  
High Power ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Drain Current ◽  
Power Added Efficiency ◽  
Effect Transistor ◽  
The Relationship

An improved ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (IUU-MESFET) is proposed in this paper. The structure is obtained by modifying the ultrahigh upper gate height h of the ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (UU-MESFET) structure, and the h is 0.1 μm and 0.2 μm for the IUU-MESFET and UU-MESFET, respectively. Compared with the UU-MESFET, the IUU-MESFET structure has a greater threshold voltage and trans-conductance, and smaller breakdown voltage and saturation drain current, and when the ultrahigh upper gate height h is 0.1 μm, the relationship between these parameters is balanced, so as to solve the contradictory relationship that these parameters cannot be improved simultaneously. Therefore, the power added efficiency (PAE) of the IUU-MESFET structure is increased from 60.16% to 70.99% compared with the UU-MESFET, and advanced by 18%.

scholarly journals Broadband Performance Assessment of an RF Power Transistor Employing the Real Frequency Technique

2022 ◽  
Author(s):  
siddik yarman
Keyword(s):  
Numerical Procedure ◽  
Rf Power ◽  
Power Performance ◽  
Power Transistor ◽  
Gain Bandwidth ◽  
Active Device ◽  
Power Added Efficiency ◽  
Real Frequency ◽  
The Given ◽  
Load Pull

selected active device is essential to design an RF power amplifier for optimum gain and power added efficiency. As they are obtained, these impedances may not be realizable network functions over the desired frequency band to yield the input and the output matching networks for the amplifier. Therefore, in this paper, first, we introduce a new method to test if a given impedance is realizable. Then, a novel “Real Frequency Line Segment Technique” based numerical procedure is introduced to assess the gain-bandwidth limitations of the given source and load impedances, which in turn results in the ultimate RF-power intake/ delivering performance of the amplifier. During the numerical performance assessments process, a robust tool called “Virtual Gain Optimization” is presented. Finally, a new definition called “Power-Performance-Product” is introduced to measure the quality of an active device. Examples are presented to test the realizability of the given source/load pull data and to assess the gain-bandwidth limitations of the given source/load pull impedances for a 45W-GaN power transistor, namely “Cree CG2H40045”, over 0.8 -3.8 GHz bandwidth.

scholarly journals Design of W-Band GaN-on-Silicon Power Amplifier Using Low Impedance Lines

2021 ◽  
Vol 11 (19) ◽  
pp. 9017
Author(s):  
Jinho Jeong ◽  
Yeongmin Jang ◽  
Jongyoun Kim ◽  
Sosu Kim ◽  
Wansik Kim
Keyword(s):  
Power Density ◽  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
Common Source ◽  
High Electron ◽  
Large Signal ◽  
Power Added Efficiency ◽  
W Band ◽  
Gan On Si

In this paper, a high-power amplifier integrated circuit (IC) in gallium-nitride (GaN) on silicon (Si) technology is presented at a W-band (75–110 GHz). In order to mitigate the losses caused by relatively high loss tangent of Si substrate compared to silicon carbide (SiC), low-impedance microstrip lines (20–30 Ω) are adopted in the impedance matching networks. They allow for the impedance transformation between 50 Ω and very low impedances of the wide-gate transistors used for high power generation. Each stage is matched to produce enough power to drive the next stage. A Lange coupler is employed to combine two three-stage common source amplifiers, providing high output power and good input/output return loss. The designed power amplifier IC was fabricated in the commercially available 60 nm GaN-on-Si high electron mobility transistor (HEMT) foundry. From on-wafer probe measurements, it exhibits the output power higher than 26.5 dBm and power added efficiency (PAE) higher than 8.5% from 88 to 93 GHz with a large-signal gain > 10.5 dB. Peak output power is measured to be 28.9 dBm with a PAE of 13.3% and a gain of 9.9 dB at 90 GHz, which corresponds to the power density of 1.94 W/mm. To the best of the authors’ knowledge, this result belongs to the highest output power and power density among the reported power amplifier ICs in GaN-on-Si HEMT technologies operating at the W-band.

scholarly journals Dual-band impedance transformation networks for integrated power amplifiers

2014 ◽  
Vol 8 (1) ◽  
pp. 1-7 ◽  
Author(s):  
Robert Wolf ◽  
Niko Joram ◽  
Stefan Schumann ◽  
Frank Ellinger
Keyword(s):  
Output Power ◽  
Power Amplifiers ◽  
Design Procedure ◽  
Dual Band ◽  
Analysis Method ◽  
Large Signal ◽  
Fully Integrated ◽  
Power Added Efficiency ◽  
Relative Bandwidth ◽  
Measurement Results

This paper shows that the two most common impedance transformation networks for power amplifiers (PAs) can be designed to achieve optimum transformation at two frequencies. Hence, a larger bandwidth for the required impedance transformation ratio is achieved. A design procedure is proposed, which takes imperfections like losses into account. Furthermore, an analysis method is presented to estimate the maximum uncompressed output power of a PA with respect to frequency. Based on these results, a fully integrated PA with a dual-band impedance transformation network is designed and its functionality is proven by large signal measurement results. The amplifier covers the frequency band from 450 MHz to 1.2 GHz (3 dB bandwidth of the output power and efficiency), corresponding to a relative bandwidth of more than 100%. It delivers 23.7 dBm output power in the 1 dB compression point, having a power-added efficiency of 33%.

A 4.2-to-5.4 GHz stacked GaAs HBT power amplifier for C-band applications

Circuit World ◽  
2020 ◽  
Vol 46 (4) ◽  
pp. 243-248
Author(s):  
Min Liu ◽  
Panpan Xu ◽  
Jincan Zhang ◽  
Bo Liu ◽  
Liwen Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
High Efficiency ◽  
Common Source ◽  
Power Performance ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Saturated Output Power

Purpose Power amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications. Design/methodology/approach A common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks. Findings By using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm2 and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz. Originality/value The technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

Correlation of Drain Current Pulsed Response with Microwave Power Output in AlGaN/GaN HEMTs

1999 ◽  
Vol 572 ◽  
Author(s):  
S. C. Binari ◽  
K. Ikossi-Anastasiou ◽  
W. Kruppa ◽  
H. B. Dietrich ◽  
G. Kelner ◽  
...  
Keyword(s):  
Power Output ◽  
Microwave Power ◽  
Drain Current ◽  
Current Response ◽  
Small Signal ◽  
Power Performance ◽  
Device Structure ◽  
Gan Hemt ◽  
Signal Characteristics ◽  
Power Densities

ABSTRACTThe drain-current response to short (<1μs) gate pulses has been measured for a series of GaN HEMT wafers that have similar dc and small-signal characteristics. This response has been found to correlate well with the measured microwave power output. For example, for devices where the pulsed drain current is greater than 70% of the dc value, output power densities of up to 2.3 W/mm are attained. This is in contrast with 0.5 W/mm measured for devices with low pulse response (less than 20% of the dc value). These results, which can be explained by the presence of traps in the device structure, provide a convenient test which is predictive of power performance.

Sign in / Sign up

Export Citation Format

Share Document