Angle Resolved XPS Analysis of Surface Region Defects in Rapid Thermal Annealed Antimony Implanted Silicon

1989 ◽  
Vol 163 ◽  
Author(s):  
S.N. Kumar ◽  
G. Chaussemy ◽  
A. Laugier ◽  
B. Canut ◽  
M. Charbonnier
Keyword(s):  
Photoelectron Spectroscopy ◽  
Oxygen Diffusion ◽  
Surface Region ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
High Dose ◽  
Thermal Treatments ◽  
X Ray ◽  
Capacitance Voltage

AbstractAngle-resolved X-ray photoelectron spectroscopy characterization of the surface region of high-dose Sb+ ion implanted silicon, after rapid thermal treatments over various temperatures, is reported. The results obtained are compared with the Rutherford backscattering data and the capacitance-voltage measurements on the metal-oxide-semiconductor mesa structures built on them. Rapid anneal at 1100 °C of the 1.4×1016 Sb+/cm2 samples showed an anomalous deep oxygen diffusion inside the implanted region.

Comprehensive physical and electrical characterizations of NO nitrided SiO2/4H-SiC(1120) interfaces

2021 ◽  
Author(s):  
Takato Nakanuma ◽  
Yu Iwakata ◽  
Arisa Watanabe ◽  
Takuji Hosoi ◽  
Takuma Kobayashi ◽  
...  
Keyword(s):  
Photoelectron Spectroscopy ◽  
Nitrogen Concentration ◽  
Depth Profiling ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Mos Capacitors ◽  
X Ray ◽  
Capacitance Voltage ◽  
Experimental Findings ◽  
Electrical Characterizations

Abstract Nitridation of SiO2/4H-SiC(1120) interfaces with post-oxidation annealing in an NO ambient (NO-POA) and its impact on the electrical properties were investigated. Sub-nm-resolution nitrogen depth profiling at the interfaces was conducted by using a scanning x-ray photoelectron spectroscopy microprobe. The results showed that nitrogen atoms were incorporated just at the interface and that interface nitridation proceeded much faster than at SiO2/SiC(0001) interfaces, resulting in a 2.3 times higher nitrogen concentration. Electrical characterizations of metal-oxide-semiconductor capacitors were conducted through capacitance-voltage (C–V) measurements in the dark and under illumination with ultraviolet light to evaluate the electrical defects near the conduction and valence band edges and those causing hysteresis and shifting of the C–V curves. While all of these defects were passivated with the progress of the interface nitridation, excessive nitridation resulted in degradation of the MOS capacitors. The optimal conditions for NO-POA are discussed on the basis of these experimental findings.

Shallow Traps at P-Doped SiO2/4H-SiC(0001) Interface

2011 ◽  
Vol 679-680 ◽  
pp. 338-341 ◽  
Author(s):  
Dai Okamoto ◽  
Hiroshi Yano ◽  
Shinya Kotake ◽  
Tomoaki Hatayama ◽  
Takashi Fuyuki
Keyword(s):  
Photoelectron Spectroscopy ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Interface Traps ◽  
Channel Mobility ◽  
X Ray ◽  
Capacitance Voltage ◽  
Shallow Traps

We report on electrical and physical investigations aimed to clarify the mechanisms behind the high channel mobility of 4H-SiC metal–oxide–semiconductor field-effect transistors processed with POCl3 annealing. By low-temperature capacitance–voltage analysis, we found that the shallow interface traps are effectively removed by P incorporation. Using x-ray photoelectron spectroscopy, we found that the three-fold coordinated P atoms exist at the oxide/4H-SiC interface. The overall results suggest that P atoms directly remove the Si–Si bonds and thus eliminate the near-interface traps.

scholarly journals Characterization of dislocations in germanium layers grown on (011)- and (111)-oriented silicon by coplanar and noncoplanar X-ray diffraction

2015 ◽  
Vol 48 (3) ◽  
pp. 655-665 ◽  
Author(s):  
Andrei Benediktovitch ◽  
Alexei Zhylik ◽  
Tatjana Ulyanenkova ◽  
Maksym Myronov ◽  
Alex Ulyanenkov
Keyword(s):  
Dislocation Line ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Misfit Dislocations ◽  
X Ray Diffraction ◽  
X Ray ◽  
Lattice Constants ◽  
Silicon And Germanium

Strained germanium grown on silicon with nonstandard surface orientations like (011) or (111) is a promising material for various semiconductor applications, for example complementary metal-oxide semiconductor transistors. However, because of the large mismatch between the lattice constants of silicon and germanium, the growth of such systems is challenged by nucleation and propagation of threading and misfit dislocations that degrade the electrical properties. To analyze the dislocation microstructure of Ge films on Si(011) and Si(111), a set of reciprocal space maps and profiles measured in noncoplanar geometry was collected. To process the data, the approach proposed by Kaganer, Köhler, Schmidbauer, Opitz & Jenichen [Phys. Rev. B, (1997),55, 1793–1810] has been generalized to an arbitrary surface orientation, arbitrary dislocation line direction and noncoplanar measurement scheme.

Impact of Phosphorus Implantation on the Electrical Properties of SiO2/4H-SiC Interfaces Annealed in N2O

2016 ◽  
Vol 858 ◽  
pp. 701-704
Author(s):  
Patrick Fiorenza ◽  
Salvatore di Franco ◽  
Filippo Giannazzo ◽  
Simone Rascunà ◽  
Mario Saggio ◽  
...  
Keyword(s):  
High Temperature ◽  
High Resolution ◽  
Electrical Properties ◽  
Surface Region ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Electrical Activation ◽  
Mos Capacitors ◽  
Capacitance Voltage ◽  
Electrical Effect

In this work, the combined effect of a shallow phosphorus (P) pre-implantation and of a nitridation annealing in N2O on the properties of the SiO2/4H-SiC interface has been investigated. The peak carrier concentration and depth extension of the electrically active dopants introduced by the nitridation and by the combination of P pre-implantation and nitridation were determined by high resolution scanning capacitance microscopy (SCM). Macroscopic capacitance-voltage (C-V) measurements on metal oxide semiconductor (MOS) capacitors and nanoscale C-V analyses by SCM allowed to quantify the electrical effect of the donors introduced underneath the SiO2/4H-SiC interface. Phosphorous pre-implantation and subsequent high temperature electrical activation has been shown not only to produce an increased doping in the 4H-SiC surface region but also a better homogeneity of surface potential with respect to the use of N2O annealing only.

Consequences of NO Thermal Treatments in the Properties of Dielectric Films / SiC Structures

2010 ◽  
Vol 645-648 ◽  
pp. 689-692 ◽  
Author(s):  
Fernanda Chiarello Stedile ◽  
Silma Alberton Corrêa ◽  
Cláudio Radtke ◽  
Leonardo Miotti ◽  
Israel J.R. Baumvol ◽  
...  
Keyword(s):  
Nitric Oxide ◽  
Electrical Properties ◽  
Photoelectron Spectroscopy ◽  
High Frequency ◽  
Interfacial Layer ◽  
Dielectric Films ◽  
Thermal Treatments ◽  
X Ray ◽  
Nitrogen Incorporation ◽  
Capacitance Voltage

The consequences of thermal treatments in nitric oxide atmospheres on the characteristics of dielectric films / SiC structures was investigated by high-frequency capacitance-voltage measurements, X-ray photoelectron spectroscopy, and X-ray reflectometry techniques. It was observed that nitrogen incorporation in dielectric films / SiC structures leads to the formation of a thinner interfacial layer that contains carbon. This fact was related to the improvement of electrical properties of those structures.

Characterization of Graphene Gate Electrodes for Metal-Oxide-Semiconductor Devices

MRS Advances ◽  
2017 ◽  
Vol 2 (02) ◽  
pp. 103-108 ◽  
Author(s):  
Yanbin An ◽  
Aniruddh Shekhawat ◽  
Ashkan Behnam ◽  
Eric Pop ◽  
Ant Ural
Keyword(s):  
Metal Oxide ◽  
High Frequency ◽  
Tunneling Current ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Heterogeneous Integration ◽  
Gate Electrodes ◽  
Mos Devices ◽  
Capacitance Voltage

ABSTRACT We fabricate and characterize metal-oxide-semiconductor (MOS) devices with graphene as the gate electrode, 5 or 10 nm thick silicon dioxide as the insulator, and silicon as the semiconductor substrate. We find that Fowler-Nordheim tunneling dominates the gate current for the 10 nm oxide device. We also study the temperature dependence of the tunneling current in these devices in the range 77 to 300 K and extract the effective tunneling barrier height as a function of temperature for the 10 nm oxide device. Furthermore, by performing high frequency capacitance-voltage measurements, we observe a local capacitance minimum under accumulation, particularly for the 5 nm oxide device. By fitting the data using numerical simulations based on the modified density of states of graphene in the presence of charged impurities, we show that this local minimum results from the quantum capacitance of graphene. These results provide important insights for the heterogeneous integration of graphene into conventional silicon technology.

Sign in / Sign up

Export Citation Format

Share Document