Amorphous Silicon Image Sensor Arrays

1992 ◽  
Vol 258 ◽  
Author(s):  
M J Powell ◽  
I D French ◽  
J R Hughes ◽  
N C Bird ◽  
O S Davies ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
High Speed ◽  
Dynamic Range ◽  
Sensor Arrays ◽  
Image Sensor ◽  
Low Noise ◽  
Image Sensors ◽  
Frame Rate ◽  
Intimate Contact ◽  
Current Densities

ABSTRACTWe have developed a technology for 2D matrix-addressed image sensors using amorphous silicon photodiodes and thin film transistors. We have built a small prototype, having 192×192 pixels with a 20μm pixel pitch, and assessed its performance. The nip photodiodes can have dark current densities of less than 1011 A.cm-2 (up to 5V reverse bias) and peak quantum efficiencies of 88% (at 580nm). We operated the sensor in real time mode at high speed (50 Hz frame rate and 64μS line time). The image sensor has a low noise performance giving a dynamic range in excess of 104. The maximum crosstalk is about 2%, which allows at least 50 grey levels. The bottom contact of the photodiode acts as a light shield from light through the substrate, which enables the sensor to be operated as an intimate contact image sensor to image a document placed directly on top of the array. In this mode, the CTF was 75% at 2 lp.mm1. Good quality images are demonstrated in both front projection and intimate contact imaging modes.

Two Dimensional Amorphous Silicon Image Sensor Arrays

1995 ◽  
Vol 377 ◽  
Author(s):  
R. A. Street ◽  
X. D. Wu ◽  
R. Weisfield ◽  
S. Ready ◽  
R. Apte ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
High Speed ◽  
Sensor Array ◽  
Imaging System ◽  
Sensor Arrays ◽  
Image Sensor ◽  
Two Dimensional ◽  
Pixel Resolution ◽  
Array Architecture ◽  
The Matrix

ABSTRACTLarge two dimensional amorphous silicon image sensor arrays offer a new approach to electronic document input and x-ray imaging. The sensor array technology is now capable of image capture at greater than 10 frames/sec and with resolution of 200–400 spi. We describe our new high resolution imaging system, comprising a page-sized sensor array with nearly 3 million pixels, and the accompanying high speed read out and processing electronics. The key technological issues of pixel resolution, sensor fill factor, leakage currents and noise are reviewed. Measurements of a new array architecture are described, in which the sensor is formed as a single continuous film on top of the matrix addressing components.

scholarly journals Toward the Ultimate-High-Speed Image Sensor: From 10 ns to 50 ps

Sensors ◽  
2018 ◽  
Vol 18 (8) ◽  
pp. 2407 ◽  
Author(s):  
Anh Nguyen ◽  
Vu Dao ◽  
Kazuhiro Shimonomura ◽  
Kohsei Takehara ◽  
Takeharu Etoh
Keyword(s):  
Temporal Resolution ◽  
High Speed ◽  
Image Sensor ◽  
Image Sensors ◽  
Frame Rate ◽  
Resolution Limit ◽  
Performance Indices ◽  
Theoretical Limit ◽  
Theoretical Derivation ◽  
Trade Offs

The paper summarizes the evolution of the Backside-Illuminated Multi-Collection-Gate (BSI MCG) image sensors from the proposed fundamental structure to the development of a practical ultimate-high-speed silicon image sensor. A test chip of the BSI MCG image sensor achieves the temporal resolution of 10 ns. The authors have derived the expression of the temporal resolution limit of photoelectron conversion layers. For silicon image sensors, the limit is 11.1 ps. By considering the theoretical derivation, a high-speed image sensor designed can achieve the frame rate close to the theoretical limit. However, some of the conditions conflict with performance indices other than the frame rate, such as sensitivity and crosstalk. After adjusting these trade-offs, a simple pixel model of the image sensor is designed and evaluated by simulations. The results reveal that the sensor can achieve a temporal resolution of 50 ps with the existing technology.

scholarly journals Design Improvements on Fast, High-Order, Incremental Sigma-Delta ADCs for Low-Noise Stacked CMOS Image Sensors

Electronics ◽  
2021 ◽  
Vol 10 (16) ◽  
pp. 1936
Author(s):  
Luis Miguel Carvalho Freitas ◽  
Fernando Morgado-Dias
Keyword(s):  
Low Power ◽  
Dynamic Range ◽  
Low Voltage ◽  
Flicker Noise ◽  
Image Sensor ◽  
Low Noise ◽  
Image Noise ◽  
Frame Rate ◽  
Direct Role ◽  
Sigma Delta

Modern CMOS imaging devices are present everywhere, in the form of line, area and depth scanners. These image devices can be used in the automotive field, in industrial applications, in the consumer’s market, and in various medical and scientific areas. Particularly in industrial and scientific applications, the low-light noise performance or the high dynamic-range features are often the cases of interest, combined with low power dissipation and high frame rates. In this sense, the noise floor performance and the power consumption are the focus of this work, given that both are interlinked and play a direct role in the remaining sensor features. It is known that thermal and flicker noise sources are the main contributors to the degradation of the sensor performance, concerning the sensor output image noise. This paper presents an indirect way to reduce both the thermal and the flicker noise contributions by using thin-oxide low voltage supply column readout circuits and fast 3rd order incremental sigma-delta converters with noise shaping capabilities (to provide low noise output digital samples—74 μVrms; 0.7 e−rms; at 105 μV/e−), and thus performing correlated double sampling in a short time (19 μs), while dissipating significant low power (346 μW). Throughout the extensive parametric transistor-level simulations, the readout path produced 1.2% non-linearity, with a competitive saturation capacity (6.5 ke−) pixel. In addition, this paper addresses the readout parallelism as the main point of interest, decoupling resolution from the image noise and the frame rate, at virtually any array resolution. The design and simulations were performed with Virtuoso 6.17 tools (Cadence Design Systems, San Jose, CA, USA) using Spectre models from TS18IS Image Sensor 0.18 µm Process Development Kit (Tower Jazz Semiconductor, Migdal Haemek, Israel).

scholarly journals CMOS Image Sensors in Surveillance System Applications

Sensors ◽  
2021 ◽  
Vol 21 (2) ◽  
pp. 488
Author(s):  
Susrutha Babu Sukhavasi ◽  
Suparshya Babu Sukhavasi ◽  
Khaled Elleithy ◽  
Shakour Abuzneid ◽  
Abdelrahman Elleithy
Keyword(s):  
Dynamic Range ◽  
Signal To Noise Ratio ◽  
Image Sensor ◽  
Image Sensors ◽  
Visual Surveillance ◽  
Frame Rate ◽  
Surveillance Systems ◽  
Aerial Surveillance ◽  
Cmos Image Sensors ◽  
Design Characteristics

Recent technology advances in CMOS image sensors (CIS) enable their utilization in the most demanding of surveillance fields, especially visual surveillance and intrusion detection in intelligent surveillance systems, aerial surveillance in war zones, Earth environmental surveillance by satellites in space monitoring, agricultural monitoring using wireless sensor networks and internet of things and driver assistance in automotive fields. This paper presents an overview of CMOS image sensor-based surveillance applications over the last decade by tabulating the design characteristics related to image quality such as resolution, frame rate, dynamic range, signal-to-noise ratio, and also processing technology. Different models of CMOS image sensors used in all applications have been surveyed and tabulated for every year and application.

scholarly journals On-CMOS Image Sensor Processing for Lane Detection

Sensors ◽  
2021 ◽  
Vol 21 (11) ◽  
pp. 3713
Author(s):  
Soyeon Lee ◽  
Bohyeok Jeong ◽  
Keunyeol Park ◽  
Minkyu Song ◽  
Soo Youn Kim
Keyword(s):  
Edge Detection ◽  
High Speed ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Image Resolution ◽  
Lane Detection ◽  
Frame Rate ◽  
Total Power ◽  
Detection Accuracy ◽  
Total Power Consumption

This paper presents a CMOS image sensor (CIS) with built-in lane detection computing circuits for automotive applications. We propose on-CIS processing with an edge detection mask used in the readout circuit of the conventional CIS structure for high-speed lane detection. Furthermore, the edge detection mask can detect the edges of slanting lanes to improve accuracy. A prototype of the proposed CIS was fabricated using a 110 nm CIS process. It has an image resolution of 160 (H) × 120 (V) and a frame rate of 113, and it occupies an area of 5900 μm × 5240 μm. A comparison of its lane detection accuracy with that of existing edge detection algorithms shows that it achieves an acceptable accuracy. Moreover, the total power consumption of the proposed CIS is 9.7 mW at pixel, analog, and digital supply voltages of 3.3, 3.3, and 1.5 V, respectively.

Dynamic range enhancement in high-speed image sensors

2000 ◽  
Author(s):  
S. E. Alexandrov ◽  
Gennadii A. Gavrilov ◽  
V. K. Gusev ◽  
E. E. Mukhin ◽  
Galina Y. Sotnikova
Keyword(s):  
High Speed ◽  
Dynamic Range ◽  
Image Sensors

High-Speed, High Dynamic-Range Optical Sensor Arrays

2009 ◽  
Vol 56 (3) ◽  
pp. 1069-1075 ◽  
Author(s):  
Stuart Kleinfelder ◽  
Shiuh-Hua Wood Chiang ◽  
Wei Huang ◽  
Ashish Shah ◽  
Kris Kwiatkowski
Keyword(s):  
Optical Sensor ◽  
High Speed ◽  
Dynamic Range ◽  
Sensor Arrays ◽  
High Dynamic Range ◽  
High Dynamic

Color Document Imaging with Amorphous Silicon Sensor Arrays

1994 ◽  
Vol 336 ◽  
Author(s):  
R. A. Street ◽  
X. D. Wu ◽  
R. Weisfield ◽  
S. Nelson ◽  
P. Nylen
Keyword(s):  
Amorphous Silicon ◽  
High Speed ◽  
Imaging System ◽  
Sensor Arrays ◽  
Color Imaging ◽  
Silicon Sensors ◽  
Imaging Properties ◽  
Color Filters ◽  
Illumination Source ◽  
Silicon Sensor

ABSTRACTWe describe the performance of an amorphous silicon imaging system designed for high speed (>10 frames/sec) scanning of a document. The system comprises a new page-sized sensor array with 1536×1920 pixels, an illumination source, and the readout electronics. With appropriate color filters, one can achieve color imaging of a document without the registration problems associated with linear scanners. We describe the color imaging properties and discuss how the color response, sensitivity and uniformity depend on the properties of the amorphous silicon sensors.

scholarly journals Design of an Edge-Detection CMOS Image Sensor with Built-in Mask Circuits

Sensors ◽  
2020 ◽  
Vol 20 (13) ◽  
pp. 3649
Author(s):  
Minhyun Jin ◽  
Hyeonseob Noh ◽  
Minkyu Song ◽  
Soo Youn Kim
Keyword(s):  
Power Consumption ◽  
Edge Detection ◽  
Low Power ◽  
High Speed ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Frame Rate ◽  
Oxide Semiconductor ◽  
Total Power ◽  
Total Power Consumption

In this paper, we propose a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) that has built-in mask circuits to selectively capture either edge-detection images or normal 8-bit images for low-power computer vision applications. To detect the edges of images in the CIS, neighboring column data are compared in in-column memories after column-parallel analog-to-digital conversion with the proposed mask. The proposed built-in mask circuits are implemented in the CIS without a complex image signal processer to obtain edge images with high speed and low power consumption. According to the measurement results, edge images were successfully obtained with a maximum frame rate of 60 fps. A prototype sensor with 1920 × 1440 resolution was fabricated with a 90-nm 1-poly 5-metal CIS process. The area of the 4-shared 4T-active pixel sensor was 1.4 × 1.4 µm2, and the chip size was 5.15 × 5.15 mm2. The total power consumption was 9.4 mW at 60 fps with supply voltages of 3.3 V (analog), 2.8 V (pixel), and 1.2 V (digital).

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