High Temperature Rectifying Contacts on Semiconducting Diamond Using Doped Silicon

1992 ◽  
Vol 270 ◽  
Author(s):  
V. Venkatesan ◽  
D.G. Thompson ◽  
K. Das

ABSTRACTHigh temperature rectifying contacts have been fabricated on naturally occurring lib semiconducting diamond crystals using highly doped Si. Polycrystalline Si deposited by low pressure chemical vapor deposition (LPCVD) and amorphous Si deposited by sputtering were investigated. Following LPCVD deposition, the polycrystalline Si filn was doped with P by solid state diffusion at a temperature of 900°C using a POCI3 source. Boron doped and As doped Si films were deposited by sputtering from highly doped Si targets. Current-voltage measurements were performed on the fabricated P doped, B doped and As doped Si contacts from room temperature up to ∼400∼C. In all cases, the contacts yielded excellent rectification in the temperature range investigated. Current conduction in doped Si/diamond systems appears to be space charge limited. The position and concentration of deep levels in a natural lib diamond crystal have been determined from an analysis of space charge limited current-voltage (I-V) characteristics.

2016 ◽  
Vol 119 (14) ◽  
pp. 145702 ◽  
Author(s):  
Pramod Reddy ◽  
Shun Washiyama ◽  
Felix Kaess ◽  
M. Hayden Breckenridge ◽  
Luis H. Hernandez-Balderrama ◽  
...  

1996 ◽  
Vol 424 ◽  
Author(s):  
Y.-H. Song ◽  
S.-Y. Kang ◽  
K. I. Cho ◽  
H. J. Yoo ◽  
J. H. Kim ◽  
...  

AbstractThe substrate effects on the solid-phase crystallization of amorphous silicon (a-Si) have been extensively investigated. The a-Si films were prepared on two kinds of substrates, a thermally oxidized Si wafer (SiO2/Si) and a quartz, by low-pressure chemical vapor deposition (LPCVD) using Si2H6 gas at 470 °C and annealed at 600 °C in an N2 ambient for crystallization. The analysis using XRD and Raman scattering shows that crystalline nuclei are faster formed on the SiO2/Si than on the quartz, and the time needed for the complete crystallization of a-Si films on the SiO2/Si is greatly reduced to 8 h from ˜15 h on the quartz. In this study, it was first observed that crystallization in the a-Si deposited on the SiO2/Si starts from the interface between the a-Si film and the thermal oxide of the substrate, called interface-induced crystallization, while random nucleation process dominates on the quartz. The very smooth surface of the SiO2/Si substrate is responsible for the observed interface-induced crystallization of a-Si films.


2000 ◽  
Vol 15 (7) ◽  
pp. 1630-1634 ◽  
Author(s):  
A. Rodríguez ◽  
J. Olivares ◽  
C. González ◽  
J. Sangrador ◽  
T. Rodríguez ◽  
...  

The crystallization kinetics and film microstructure of poly-SiGe layers obtained by solid-phase crystallization of unimplanted and C- and F-implanted 100-nm-thick amorphous SiGe films deposited by low-pressure chemical vapor deposition on thermally oxidized Si wafers were studied. After crystallization, the F- and C-implanted SiGe films showed larger grain sizes, both in-plane and perpendicular to the surface of the sample, than the unimplanted SiGe films. Also, the (111) texture was strongly enhanced when compared to the unimplanted SiGe or Si films. The crystallized F-implanted SiGe samples showed the dendrite-shaped grains characteristic of solid-phase crystallized pure Si. The structure of the unimplanted SiGe and C-implanted SiGe samples consisted of a mixture of grains with well-defined contour and a small number of quasi-dendritic grains. These samples also showed a very low grain-size dispersion.


1991 ◽  
Vol 219 ◽  
Author(s):  
D. R. Lee ◽  
C. H. Bjorkman ◽  
C. Wang ◽  
G. Lucovsky

ABSTRACTCurrent-voltage voltage characteristics of heterojunctions formed by remote plasma enhanced chemical vapor deposition (PECVD) of heavily doped μc-Si onto doped c-Si have been studied, as well as capacitance-voltage characteristics of MOS capacitor structures using heavily doped remote PECVD μc-Si and a-Si films as gate electrodes on thermally oxidized crystalline Si. Shifts in the flat-band voltages of MOS devices using the μc-Si and a-Si as gate electrodes relative to that of a reference Al/SiO2/c-Si structure are measured and explained in terms of a band structure model for the μc-Si and a-Si. Rectification and a photovoltaic effect observed in the pn heterojunctions are also explained in context of the same model.


2021 ◽  
Vol 24 (04) ◽  
pp. 407-412
Author(s):  
A.V. Naumov ◽  
◽  
V.V. Kaliuzhnyi ◽  
S.A. Vitusevich ◽  
H. Hardtdegen ◽  
...  

In this work, we have investigated the features of electron transport in AlGaN/GaN transistor-like heterostructures with nanowires of different width. These nanostructures are studied extensively because of their great electronic and sensing advantages for electronic biosensor applications. We study the depletion effects and impact of ultraviolet excitation on the electron transport in sets of nanowires of different width from 1110 down to 185 nm. We have found significant difference in electrical characteristic’s behavior between wide (1110…480 nm) and narrow (280…185 nm) nanowires and have observed regions related to space-charge-limited transport for the narrowest nanowires. Also, we obtained evident dependence of nanowire’s current-voltage characteristics on the wavelength and energy of UV excitation. External UV excitation allows us to control the depletion widths in nanowires and effectively tune space-charge-limited transport.


2003 ◽  
Vol 762 ◽  
Author(s):  
Yaocheng Liu ◽  
Michael D. Deal ◽  
Mahmooda Sultana ◽  
James D. Plummer

AbstractMetal-induced crystallization (MIC) of amorphous Si is gaining increased interest because of its potential use for low-temperature fabrication of integrated circuits. In this work, the MIC technique was used to make Si nanocrystals and the effects of stress on the crystallization were studied. Amorphous Si films were deposited onto the Si substrate with thermal oxides on top by low-pressure chemical vapor deposition (LPCVD) and then patterned into nanoscale pillars by electron beam lithography and reactive ion etching. A conformal low-temperature oxide (LTO) layer was deposited to cover the pillars, followed by an anisotropic etch back to form a spacer, leaving only the top surface of the pillars exposed to the 5 nm Ni sputtering deposition afterwards. An HF dip was used to partially remove the LTO spacers on the pillars, leading to different LTO thicknesses on different samples. These samples were then annealed to crystallize the amorphous Si pillars, forming Si nanocrystals. Transmission electron microscope (TEM) observations after anneal found a clear dependence of the crystallization rate on the pillar size as well as the LTO thickness. The crystallization rate was lower for pillars with thicker LTO spacers, while for the same LTO thickness the crystallization rate was lower for pillars with narrower width. A model based on the stress in the pillars is proposed to explain this dependence. This model suggests some methods to control the nickel-induced crystallization process and achieve higher quality Si nanocrystals.


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