High Quality in.Ga1−xas Heterostructures Grown on GaAs With Movpe

1998 ◽  
Vol 510 ◽  
Author(s):  
M.T. Bulsara ◽  
E.A. Fitzgerald
Keyword(s):  
Surface Roughness ◽  
Phase Separation ◽  
Threading Dislocation ◽  
Misfit Dislocations ◽  
Cross Sectional ◽  
Plan View ◽  
Force Microscopy ◽  
Optimum Growth Temperature ◽  
Transmission Electron ◽  
Metal Organic

AbstractInxGa1−xAs structures with compositionally graded buffers were grown by metal-organic vapor phase epitaxy (MOVPE) on GaAs substrates and characterized with plan-view and cross-sectional transmission electron microscopy (PV-TEM and X-TEM), atomic force microscopy (AFM), and x-ray diffraction (XRD). The results show that surface roughness experiences a maximum at growth temperatures where phase separation occurs in InxGa1−xAs. The strain energy due misfit dislocations in the graded buffer indirectly influences phase separation. At growth temperatures above and below this temperature, the surface roughness is decreased significantly; however, only growth temperatures above this regime ensure nearly complete relaxed graded buffers with the most uniform composition caps. With the optimum growth temperature for grading InxGa1−xAs determined to be 700°C, it was possible to produce In0.33Ga0.67As diode structures on GaAs with threading dislocation densities < 8.5 × 106/cm2

Relaxed Inx.Ga1−xas Graded Buffers Grown With Organometallic Vapor Phase Epitaxy on GaAs

1997 ◽  
Vol 484 ◽  
Author(s):  
M. T. Bulsara ◽  
C. Leitz ◽  
E. A. Fitzgerald
Keyword(s):  
Surface Roughness ◽  
Phase Separation ◽  
Vapor Phase ◽  
Vapor Phase Epitaxy ◽  
Threading Dislocation ◽  
Misfit Dislocations ◽  
Organometallic Vapor Phase Epitaxy ◽  
Cross Sectional ◽  
Plan View ◽  
Optimum Growth Temperature

AbstractInxGa1−xAs structures with compositionally graded buffers were grown with organometallic vapor phase epitaxy (OMVPE) on GaAs substrates and characterized with plan-view and cross-sectional transmission electron microscopy (PV-TEM and X-TEM), atomic force microscopy (AFM), and x-ray diffraction (XRD). The results show that surface roughness experiences a maximum at growth temperatures where phase separation occurs in In.Gal.,As. The strain fields from misfit dislocations induce this phase separation in the <110> directions. At growth temperatures above and below this temperature, the surface roughness decreases significantly; however, only growth temperatures above this regime ensure nearly complete relaxed graded buffers with the most uniform composition caps. With the optimum growth temperature for grading InxGa1−x,As determined to be 700 °C, it was possible to produce In0.33Ga0.67As diodes on GaAs with threading dislocation densities < 8.5 × 106/cm2.

Si1-xGex Critical Thickness for Surface Wave Generation During UHV-CVD Growth at 525°C

1995 ◽  
Vol 399 ◽  
Author(s):  
H. Lafontaine ◽  
D.C. Houghton ◽  
B. Bahierathan ◽  
D.D. Perovic ◽  
J.-M. Baribeau
Keyword(s):  
Electron Microscopy ◽  
Surface Waves ◽  
Critical Thickness ◽  
Critical Value ◽  
Misfit Dislocations ◽  
Cross Sectional ◽  
Force Microscopy ◽  
Atomic Force ◽  
Transmission Electron ◽  
Cvd Growth

ABSTRACTSeveral Si1-xGex/Si heterostructures were grown at 525°C using a commercially available UHV-CVD reactor. Layers with a germanium fraction ranging from 0.15 to 0.5 were examined by means of cross-sectional transmission electron microscopy and atomic force microscopy. Surface waves were found in layers with a thickness above a critical value which decreases rapidly as the Ge fraction is increased. Both experimental and modeling results show that surface waves are generated before misfit dislocations for Ge fractions above 0.3.

Strain Relaxation in GaAs on Si by Two Groups of Misfit Dislocations

1995 ◽  
Vol 399 ◽  
Author(s):  
M. Tamura ◽  
T. Saitoh ◽  
T. Yodo
Keyword(s):  
Strain Relaxation ◽  
Lattice Misfit ◽  
Misfit Dislocations ◽  
Cross Sectional ◽  
Plan View ◽  
Partial Dislocations ◽  
Group I ◽  
Transmission Electron ◽  
Before And After ◽  
Gaas Films

ABSTRACTHigh-resolution cross-sectional and conventional plan-view transmission electron microscope observations have been carried out for molecular beam epitaxially grown GaAs films on vicinal Si (001) as a function of film thicknesses and observation directions between two orthogonal <110> directions before and after annealing. Two groups of misfit dislocations are characterized by analyzing whether their extra half planes exist in the film and the substrate side. The group I misfit dislocations due to a stress caused by a lattice misfit between GaAs and Si consist of partial and, 60° and 90° complete dislocations in an as-grown state. After annealing partial dislocations almost disappear and 90° perfect dislocations are predominantly observed. The group II misfit dislocations due to a thermal-expansion misfit-induced stress are all of the 60° type complete dislocations, independent of film thickness and annealing.

Structure of Carrot Defects in 4H-SiC Epilayers

2006 ◽  
Vol 527-529 ◽  
pp. 327-332 ◽  
Author(s):  
X. Zhang ◽  
Seo Young Ha ◽  
M. Benamara ◽  
Marek Skowronski ◽  
Joseph J. Sumakeris ◽  
...  
Keyword(s):  
Basal Plane ◽  
Cross Sectional ◽  
Plan View ◽  
X Ray ◽  
Force Microscopy ◽  
Carrier Recombination ◽  
Atomic Force ◽  
Transmission Electron ◽  
Homoepitaxial Layers ◽  
Koh Etching

Structure of the “carrot” defects in 4H-SiC homoepitaxial layers deposited by CVD has been investigated by plan-view and cross-sectional transmission x-ray topography, cross-sectional transmission electron microscopy, atomic force microscopy, and KOH etching. The carrot defects nucleate at the substrate/epilayer interface at the emergence points of threading screw dislocations propagating from the substrate. The typical defect consists of two stacking faults: one in the prismatic plane with second one in the basal plane. The faults are connected by a stair-rod dislocation with Burgers vector 1/n[10-10] with n>3 at the cross-over. The basal plane fault is of Frank-type. Carrot defects are electrically active as evidenced by contrast in EBIC images indicating enhanced carrier recombination rate. Presence of carrot defects in the p-i-n diodes results in higher pre-breakdown reverse leakage current and approximately 50% lower breakdown voltage compared to the nominal value.

Microstructural Characterization of Low Temperature GaAs(111)B MBE Growth by AFM and Tem

1992 ◽  
Vol 280 ◽  
Author(s):  
M. P. de Boer ◽  
J. E. Angelo ◽  
A. M. Dabiran ◽  
P. I. Cohen ◽  
W. W. Gerberich
Keyword(s):  
Low Temperature ◽  
Microstructural Characterization ◽  
Cross Sectional ◽  
Plan View ◽  
Mbe Growth ◽  
Force Microscopy ◽  
Atomic Force ◽  
Transmission Electron ◽  
Low Temperature Gaas

ABSTRACTAtomic Force Microscopy (AFM) images are correlated with Transmission Electron Microscopy (TEM) plan-view images in a structure consisting of <111> oriented GaAs layers grown by molecular beam epitaxy (MBE) at 500°C. We present results on the applicability of AFM, which requires short sample preparation and imaging time relative to TEM, in obtaining information on twin density and growth pits of these low temperature samples. Also, we discuss the behavior of twin boundaries by comparing plan-views and cross sectional TEM images.

Relaxation Mechanism of the Defect-Free 3C-SiC Epitaxial Films Grown on Step-Free 4H SiC Mesas

2006 ◽  
Vol 527-529 ◽  
pp. 279-282 ◽  
Author(s):  
H. Du ◽  
Marek Skowronski ◽  
Philip G. Neudeck ◽  
Andrew J. Trunek ◽  
David J. Spry ◽  
...  
Keyword(s):  
Relaxation Mechanism ◽  
Threading Dislocation ◽  
Misfit Dislocations ◽  
Extended Defects ◽  
Cross Sectional ◽  
Transmission Electron ◽  
Dislocation Densities ◽  
Atomically Flat ◽  
Heteroepitaxial Layers ◽  
Koh Etching

Cross-sectional transmission electron microscopy (TEM) was used to investigate the extended defects in 3C-SiC films deposited on atomically flat 4H-SiC mesas. The nominal layer thickness was 10 μm and was considerably larger than the critical thickness determined by either the Matthews and Blakeslee or People and Bean models. Threading dislocation densities determined by KOH etching are far below densities typical of relaxed heteroepitaxial layers, down to as low as 104cm-2 densities found in 4H-SiC. Misfit dislocations with Burgers vectors of <11 2 0> were observed in planes parallel to the 3C/4H SiC interface. These defects were interpreted as due to nucleation of dislocation half loops at mesa edges and glide along the 3C/4H interface.

Defects In 4H Silicon Carbide CVD Epilayers

1996 ◽  
Vol 442 ◽  
Author(s):  
L. Zhou ◽  
P. Pirouz ◽  
J. A. Powell
Keyword(s):  
Formation Mechanism ◽  
Chemical Vapor ◽  
Cross Sectional ◽  
Plan View ◽  
Force Microscopy ◽  
Atomic Force ◽  
Surface Steps ◽  
Transmission Electron ◽  
Surface Decoration ◽  
Decoration Technique

AbstractThe characteristic defects of 4H-SiC homoepitaxial thin films grown on bulk substrates using chemical vapor deposition (CVD) are described based on transmission electron microscopy (TEM), atomic force microscopy (AFM) and surface decoration studies. Emphasis is placed on understanding the formation mechanism of surface triangular defects. Cross-sectional TEM observations revealed the existence of two variants of 3C-SiC inclusions in 4H epitaxial films. In the plan-view orientation, g4H = 3304 type reflections were found useful for distinguishing the two variants of 3C-SiC platelets that are present in the 4H epilayer. A decoration technique was employed to reveal the relationship between the 3C platelets and surface features, e.g., surface steps. A formation mechanism for surface triangular defects is proposed, which is partially confirmed by the etch pit patterns obtained on the epilayer surfaces after a molten KOH etch.

Anisotropy of Strain Relaxation in III-V Semiconductor Heterostructures

2004 ◽  
Vol 230-232 ◽  
pp. 93-100 ◽  
Author(s):  
O. Yastrubchak ◽  
T. Wosiński ◽  
J.Z. Domagała ◽  
E. Łusakowska
Keyword(s):  
Lattice Mismatch ◽  
Strain Relaxation ◽  
Growth Conditions ◽  
Threading Dislocation ◽  
Misfit Dislocations ◽  
Misfit Stress ◽  
Force Microscopy ◽  
Atomic Force ◽  
Transmission Electron ◽  
Small Lattice

Partially relaxed III–V heterostructures: GaAs/InGaAs and InP/InAlAs/InGaAs, with a small lattice mismatch, grown using molecular beam epitaxy under compressive or tensile misfit stress at the (001) interface, have been investigated by means of high-resolution X-ray diffractometry, atomic force microscopy and generalized ellipsometry. Additionally, transmission electron microscopy and electron-beam induced current in a scanning electron microscope have been employed to reveal misfit dislocations at the heterostructure interface. Chemical etching was used to determine polarity of the crystals and threading dislocation densities in the epitaxial layers. Our findings are interpreted in terms of the dependent on growth conditions, material’s composition and doping glide velocities of two types of misfit dislocations: α and β, differing in their core structure and lying along two orthogonal 〈110〉 crystallographic directions at the (001) interface.

A New Method of Wafer Level Plan View TEM Sample Preparation by DualBeam

2008 ◽  
Author(s):  
Hyoung H. Kang ◽  
Michael A. Gribelyuk ◽  
Oliver D. Patterson ◽  
Steven B. Herschbein ◽  
Corey Senowitz
Keyword(s):  
Sample Preparation ◽  
Ex Situ ◽  
Wafer Level ◽  
Cross Sectional ◽  
Plan View ◽  
Manufacturing Line ◽  
Transmission Electron ◽  
Thin Lamella ◽  
Preparation Techniques

Abstract Cross-sectional style transmission electron microscopy (TEM) sample preparation techniques by DualBeam (SEM/FIB) systems are widely used in both laboratory and manufacturing lines with either in-situ or ex-situ lift out methods. By contrast, however, the plan view TEM sample has only been prepared in the laboratory environment, and only after breaking the wafer. This paper introduces a novel methodology for in-line, plan view TEM sample preparation at the 300mm wafer level that does not require breaking the wafer. It also presents the benefit of the technique on electrically short defects. The methodology of thin lamella TEM sample preparation for plan view work in two different tool configurations is also presented. The detailed procedure of thin lamella sample preparation is also described. In-line, full wafer plan view (S)TEM provides a quick turn around solution for defect analysis in the manufacturing line.

Defect-Engineered Graded GexSi1-x Buffers on Si (001) with Extreme Low Threading Dislocation Density

1995 ◽  
Vol 378 ◽  
Author(s):  
G. Kissinger ◽  
T. Morgenstern ◽  
G. Morgenstern ◽  
H. B. Erzgräber ◽  
H. Richter
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Atomic Force Microscopy ◽  
Dislocation Density ◽  
Threading Dislocation ◽  
Force Microscopy ◽  
Atomic Force ◽  
Transmission Electron ◽  
Dislocation Densities ◽  
Threading Dislocation Density

AbstractStepwise equilibrated graded GexSii-x (x≤0.2) buffers with threading dislocation densities between 102 and 103 cm−2 on the whole area of 4 inch silicon wafers were grown and studied by transmission electron microscopy, defect etching, atomic force microscopy and photoluminescence spectroscopy.

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