Effect of TiN Treated by Rapid Thermal Annealing on Properties of BST Capacitors Prepared by RF Magnetron Co-sputter System at Low Substrate Temperature

1999 ◽  
Vol 596 ◽  
Author(s):  
T. H. Teng ◽  
C. C. Hwang ◽  
M. J. Lai ◽  
S. C. Huang ◽  
J. S. Chen ◽  
...  

AbstractIn this work, (Ba0.7Sr0.3)TiO3 thin films on Pt/TiN/Ti/Si substrate were deposited by an RF magnetron co-sputter system at 300°C in an Ar+O2 mixed ambient. In the integration of BST capacitors, the diffusion barrier (TiN) under bottom electrodes is one of the key issues. To obtain a stable and excellent diffusion barrier against inter-diffusion between Pt and Si, as well as against being oxidized during BST deposition, TiN was treated by a rapid thermal annealing (RTA) process. Experimental results indicated that proper RTA treatments resulted in a superior TiN barrier layer. In addition, low substrate temperature during BST deposition suppressed the phenomena of inter-diffusion and barrier oxidation. Furthermore, Pt hillocking, another problem during BST deposition because of high thermal budget, was also solved by reducing substrate temperature during BST deposition. The MIM (Pt/BST/Pt) structure was used in the experiments for electrical properties measurement. High dielectric constant (εr =300), low leakage current (l.5×10−8 A/cm2) under 0.1MV/cm, and 10 year lifetime under 1.6MV/cm were achieved with an Ar+O2 mixed ambient at a low substrate temperature (300°C).

2001 ◽  
Vol 672 ◽  
Author(s):  
Miin-Horng Juang ◽  
Chuan-Chou Hwang ◽  
Huang-Chung Cheng

ABSTRACTEffect of rapid-thermal-annealing on metallic barrier TiN against the interdiffusions of Ti and Si into BST in Pt/BST/Pt/TiN/Ti/Si capacitors has been studied. In the integration of BST capacitors, the thermal budget of the BST deposition would cause the inter-diffusions of Ti and Si from Ti adhesion layer and Si-plug respectively. This event would degrade the BST capacitors. To address this issue, rapid-thermal-annealed TiN barriers were used between the bottom electrode Pt and adhesion layer Ti. Optimal RTA condition for TiN were found in this experiment. Excellent electrical characteristics of Pt/BST/Pt/TiN/Ti/Si capacitors, including high dielectric constant (εr =320), low leakage current (1.5×10−8 A/cm2) under 0.1 MV/cm, and life time longer than 10 year lifetime under 1.6 MV/cm were obtained with Ar+O2 mixed ambient at a low substrate temperature (300°C).


1990 ◽  
Vol 203 ◽  
Author(s):  
P. Li ◽  
B. Gittleman ◽  
T.-M. Lu

ABSTRACTHigh dielectric constant thin films for packaging applications were studied. Compared with polycrystalline or epitaxial ferroelectric thin films amorphous ferroelectric films are a promising alternative because of their ease of processing and low leakage current. Reactive Partially Ionized Beam deposition (RPIB) offers a new approach to deposit high dielectric constant films at a low substrate temperature. As an example, the growth of amorphous BaTiOs thin films using RPIB deposition is described. The films were characterized in terms of dielectric constant and leakage current. The annealing effects on the film properties are also discussed.


2013 ◽  
Vol 750-752 ◽  
pp. 931-935
Author(s):  
Xue Na Yang ◽  
Jian An Liu ◽  
Bai Biao Huang ◽  
Si Jiang Gao

La-doped (Bi1-xLax)2Ti2O7 (BLTO) thin films with different La contents have been grown by CSD method. All the XRD patterns of the samples showed that the films were polycrystalline films. The intensities of the peaks decreased with the increasing of La contents. The general trend of the changes of leakage current was decreased with the increasing of x. The case of dielectric constant as a function of La content is complicated. The rule of change of the dielectric constant is different with different la contents. In view of dielectric constant and dielectric loss, we think that the film of x=0.2 has relative low leakage current and high dielectric constant, which is considered to be adequate for a DRAM.


2006 ◽  
Vol 89 (13) ◽  
pp. 133512 ◽  
Author(s):  
Kyoung H. Kim ◽  
Damon B. Farmer ◽  
Jean-Sebastien M. Lehn ◽  
P. Venkateswara Rao ◽  
Roy G. Gordon

2010 ◽  
Vol 663-665 ◽  
pp. 413-416 ◽  
Author(s):  
Chen Yang ◽  
Zhi Ming Chen ◽  
Ying Xue Xi ◽  
Tao Lin

In this paper, thin HfO2 films were grown by using E-beam evaporation technique in vacuum and O2 ambient, respectively. Effects of O2 ambient on structural, optical and electrical properties of the HfO2 films were investigated by deploying x-ray photoelectron spectroscopy, ultraviolet visible spectroscopy, I-V and C-V characteristics. Results show that the O2 ambient deposited HfO2 films exhibited excellent structural, optical and electrical properties as compared with vacuum ambient HfO2 films, which especially performs a low content of metal Hf, a high transmittance, a low leakage current and a high dielectric constant.


2002 ◽  
Vol 716 ◽  
Author(s):  
G.Z. Pan ◽  
E.W. Chang ◽  
Y. Rahmat-Samii

AbstractWe comparatively studied the formation of ultra thin Co silicides, Co2Si, CoSi and CoSi2, with/without a Ti-capped and Ti-mediated layer by using rapid thermal annealing in a N2 ambient. Four-point-probe sheet resistance measurements and plan-view electron diffraction were used to characterize the silicides as well as the epitaxial characteristics of CoSi2 with Si. We found that the formation of the Co silicides and their existing duration are strongly influenced by the presence of a Ti-capped and Ti-mediated layer. A Ti-capped layer promotes significantly CoSi formation but suppresses Co2Si, and delays CoSi2, which advantageously increases the silicidation-processing window. A Ti-mediated layer acting as a diffusion barrier to the supply of Co suppresses the formation of both Co2Si and CoSi but energetically favors directly forming CoSi2. Plan-view electron diffraction studies indicated that both a Ti-capped and Ti-mediated layer could be used to form ultra thin epitaxial CoSi2 silicide.


1989 ◽  
Vol 146 ◽  
Author(s):  
Leonard Rubin ◽  
Nicole Herbots ◽  
JoAnne Gutierrez ◽  
David Hoffman ◽  
Di Ma

ABSTRACTA method for producing shallow silicided diodes for MOS devices (with junction depths of about 0.1 µm), by implanting after forming the silicide layer was investigated. The key to this integrated process is the use of rapid thermal annealing (RTA) to activate the dopants in the silicon, so that there is very little thermal broadening of the implant distribution. Self-aligned titanium silicide (TiSi2) films with thicknesses ranging from 40 to 80 nm were grown by RTA of sputter deposited titanium films on silicon substrates. After forming the TiSi2, arsenic and boron were implanted. A second RTA step was used after implantation to activate these dopants. It was found that implanting either dopant caused a sharp increase in the sheet resistivity of the TiSi2. The resistivity can be easily restored to its original value (about 18 µΩ-cm) by a post implant RTA anneal. RBS analysis showed that arsenic diffuses rapidly in the TiSi2 during RTA at temperatures as low as 600°C. SIMS data indicated that boron was not mobile up to temperatures of 900°C, possibly because it forms a compound with the titanium which precipitates in the TiSi 2. Coalescence of TiSi2 occurs during post implant furnace annealing, leading to an increase in the sheet resistivity. The amount of coalescence depends on the film thickness, but not on whether or not the film had been subject to implantation. Spreading resistance profiling data showed that both arsenic and boron diffused into the TiSi2 during furnace annealing, reducing the surface concentrations of dopant at the TiSi2/Si interface. Both N+/P and P+/N diodes formed by this technique exhibited low leakage currents after the second RTA anneal. This is attributed to removal of the implant damage by the RTA. In summary, the second RTA serves the dual purpose of removing implant damage in the TiSi2 and creating the shallow junction by dopant activation.


1996 ◽  
Vol 424 ◽  
Author(s):  
Reece Kingi ◽  
Yaozu Wang ◽  
Stephen Fonash ◽  
Osama Awadelkarim ◽  
Yuan-Mn Li

AbstractThree approaches to modifying the solid phase crystallization kinetics of amorphous silicon thin films are examined with the goal of reducing the thermal budget and improving the poly-Si quality for thin film transistor applications. The three approaches consist of (1) variations in the PECVD a-Si deposition parameters; (2) the application of pre-fumace-anneal surface treatments; and (3) using both rapid thermal annealing and furnace annealing at different temperatures. We also examine the synergism among these approaches.Results reveal that (1) film deposition dilution and dilution/temperature changes do not strongly affect crystallization time, but do affect grain size; (2) pre-anneal surface treatments can dramatically reduce the solid phase crystallization thermal budget for diluted films and act synergistically with deposition dilution or dilution/temperature effects; and (3) rapid thermal annealing leads to different crystallization kinetics from that seen for furnace annealing.


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