Evidence of Ti-related Inclusions in an Al Alloy Interconnecting Layer for Nanometer 256MBit DRAM Semiconductor Devices Characterized by TEM, STEM, EELS Elemental Mapping, and XEDS Linescan

2002 ◽  
Vol 737 ◽  
Author(s):  
Wei Zhao ◽  
Steve Graca

ABSTRACTWith the introduction of high aspect ratio and steep geometries in deep-subquarter-micron dynamic random access memory (DRAM) device, it becomes more and more critical to understand the formation of undesired intermetallic Ti-Al phases in Al-metallization and thus better-control the profile of interconnectors. In this article, Ti-related inclusions in Metal 1 (M1) interconnecting layer (an AlCu-0.5% alloy) originated from the bottom Ti liner were characterized with an Analytical TEM. Samples were cleaved from nanometer 256Mbit dynamic random access memory DRAM devices. The TEM employed is a JEOL 2010F with a field emission gun (FEG) and running at 200KV acceleration voltage. Correlations among transmission electron microscopy (TEM), scanning transmission electron microscopy (STEM), electron energy loss spectroscopy (EELS) elemental mapping, and x-ray energy dispersive spectroscopy (XEDS) elemental linescan were established. The results here not only provide important feedbacks to semiconductor product integration and optimization, but also demonstrate the full-functionality of the start-of-the-art analytical TEM in investigations of nanometer semiconductor devices.

2013 ◽  
Vol 533 ◽  
pp. 48-53 ◽  
Author(s):  
Masaki Kudo ◽  
Masashi Arita ◽  
Yuuki Ohno ◽  
Takashi Fujii ◽  
Kouichi Hamada ◽  
...  

2015 ◽  
Vol 117 (6) ◽  
pp. 064504 ◽  
Author(s):  
J. L. M. Oosthoek ◽  
F. C. Voogt ◽  
K. Attenborough ◽  
M. A. Verheijen ◽  
G. A. M. Hurkx ◽  
...  

2013 ◽  
Vol 113 (8) ◽  
pp. 083701 ◽  
Author(s):  
Takashi Fujii ◽  
Masashi Arita ◽  
Kouichi Hamada ◽  
Yasuo Takahashi ◽  
Norihito Sakaguchi

Author(s):  
Phil Schani ◽  
S. Subramanian ◽  
Vince Soorholtz ◽  
Pat Liston ◽  
Jamey Moss ◽  
...  

Abstract Temperature sensitive single bit failures at wafer level testing on 0.4µm Fast Static Random Access Memory (FSRAM) devices are analyzed. Top down deprocessing and planar Transmission Electron Microscopy (TEM) analyses show a unique dislocation in the substrate to be the cause of these failures. The dislocation always occurs at the exact same location within the bitcell layout with respect to the single bit failing data state. The dislocation is believed to be associated with buried contact processing used in this type of bitcell layout.


Author(s):  
J. Bentley ◽  
E. A. Kenik ◽  
K. Siangchaew ◽  
M. Libera

Quantitative elemental mapping by inner shell core-loss energy-filtered transmission electron microscopy (TEM) with a Gatan Imaging Filter (GIF) interfaced to a Philips CM30 TEM operated with a LaB6 filament at 300 kV has been applied to interfaces in a range of materials. Typically, 15s exposures, slit width Δ = 30 eV, TEM magnifications ∼2000 to 5000×, and probe currents ≥200 nA, were used. Net core-loss maps were produced by AE−r background extrapolation from two pre-edge windows. Zero-loss I0 (Δ ≈ 5 eV) and “total” intensity IT (unfiltered, no slit) images were used to produce maps of t/λ = ln(IT/I0), where λ is the total inelastic mean free path. Core-loss images were corrected for diffraction contrast by normalization with low-loss images recorded with the same slit width, and for changes in thickness by normalization with t/λ, maps. Such corrected images have intensities proportional to the concentration in atoms per unit volume. Jump-ratio images (post-edge divided by pre-edge) were also produced. Spectrum lines across planar interfaces were recorded with TEM illumination by operating the GIF in the spectroscopy mode with an area-selecting slit oriented normal to the energy-dispersion direction. Planar interfaces were oriented normal to the area-selecting slit with a specimen rotation holder.


1998 ◽  
Vol 523 ◽  
Author(s):  
Hong Zhang

AbstractApplication of transmission electron microscopy on sub-half micron devices has been illustrated in terms of process evaluation and failure analysis. For process evaluation, it is emphasized that a large number of features need to be examined in order to have reliable conclusions about the processes, while for failure analysis, the goal is to pin-point a single process step causing failure or a single source introducing the particle defect.


Author(s):  
Zongliang Huo ◽  
Seungjae Baik ◽  
Shieun Kim ◽  
In-seok Yeo ◽  
U-in Chung ◽  
...  

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