Formation and Morphology Evolution of Nickel Germanides on Ge (100) under Rapid Thermal Annealing

2004 ◽  
Vol 810 ◽  
Author(s):  
K.Y. Lee ◽  
S.L. Liew ◽  
S.J. Chua ◽  
D.Z. Chi ◽  
H.P. Sun ◽  
...  

ABSTRACTPhase formation and interfacial microstructure evolution of nickel germanides formed by rapid thermal annealing in a 15-nm Ni/Ge (100) system have been studied. Coexistence of a NiGe layer and Ni-rich germanide particles was detected at 250°C. Highly textured NiGe film with a smooth interface with Ge was observed. Annealing at higher temperatures resulted in grain growth and severe grooving of the NiGe film at the substrate side, followed by serious agglomeration above 500°C. Fairly low sheet resistance was achieved in 250-500°C where the NiGe film continuity was uninterrupted.

2002 ◽  
Vol 716 ◽  
Author(s):  
G.Z. Pan ◽  
E.W. Chang ◽  
Y. Rahmat-Samii

AbstractWe comparatively studied the formation of ultra thin Co silicides, Co2Si, CoSi and CoSi2, with/without a Ti-capped and Ti-mediated layer by using rapid thermal annealing in a N2 ambient. Four-point-probe sheet resistance measurements and plan-view electron diffraction were used to characterize the silicides as well as the epitaxial characteristics of CoSi2 with Si. We found that the formation of the Co silicides and their existing duration are strongly influenced by the presence of a Ti-capped and Ti-mediated layer. A Ti-capped layer promotes significantly CoSi formation but suppresses Co2Si, and delays CoSi2, which advantageously increases the silicidation-processing window. A Ti-mediated layer acting as a diffusion barrier to the supply of Co suppresses the formation of both Co2Si and CoSi but energetically favors directly forming CoSi2. Plan-view electron diffraction studies indicated that both a Ti-capped and Ti-mediated layer could be used to form ultra thin epitaxial CoSi2 silicide.


1986 ◽  
Vol 74 ◽  
Author(s):  
A. Katz ◽  
Y. KOMEM

AbstractThe effect of Rapid Thermal Annealing on phase formation and diffusion processes in the Ni(30 nm) /Al(10 nm)/Si system was studied and coxpared to a Ni(30 nm)/Si reference system. Heat treatments were carried out at temperatures between 400°C and 900°C for 2 seconds.The results obtained by means of TEM, AES and XRD indicated that the Ni/Al/Si system underwent a local melting in the intermediate Al layer at the Al/Si eutectic temperature (577°C). This reaction, due to the rapid melting process, resulted in formation of a unique layered-structure composed of a columnar polycrystalline layer (60 nm thick) of Ni2Si and NiSi adjacent to the Si substrate with relatively smooth interface and an outer layer of two separate polycrystalline films (both about 10 m thick) of Al3Ni (inside) and Ni(Al0.5Si0.5 ) (outside). Under the same rapid thermal processing conditions the Ni/Si reference system underwent a solid state reaction which resulted in the formation of a polycrystalline layer (60 nm thick) composed of Ni2Si and NiSi as well as NiSi2.


1985 ◽  
Vol 54 ◽  
Author(s):  
J. Narayan ◽  
T. A. Stephenson ◽  
T. Brat ◽  
D. Fathy ◽  
S. J. Pennycook

ABSTRACTThe formation of titanium suicide over polycrystalline silicon has been investigated after rapid thermal annealing treatment in nitrogen and argon ambients. After rapid thermal annealing 300 Å thick titanium overlayer at 900°C for 10 seconds, the sheet resistance of about 3 Ω/□ was achieved, which decreased to 2 Ω/□ after 1100°C / 10s treatment. The TiSi2 Phase was found to be stable after RTA treatments up to 1100°C /10s with no or negligible migration of titanium along the grain boundaries in polycrystalline silicon. In the nitrogen ambient, an external layer (titanium rich, mixture of titanium oxide and nitride) was observed to form after the RTA treatment, but the surface was found clean in the argon ambient.


1997 ◽  
Vol 470 ◽  
Author(s):  
A. T. Fiory

ABSTRACTTemperatures for lamp-heated rapid thermal processing of wafers with various back-side films were controlled by a Lucent Technologies pyrometer which uses a/c lamp ripple to compensate for emissivity. Process temperatures for anneals of arsenic and boron implants were inferred from post-anneal sheet resistance, and for rapid thermal oxidation, from oxide thickness. Results imply temperature control accuracy of 12°C to 17°C at 3 standard deviations.


1991 ◽  
Vol 224 ◽  
Author(s):  
Po-Ching Chen ◽  
Jian-Yang Lin ◽  
Huey-Liang Hwang

AbstractTitanium silicide was formed on the top of Si wafers by arsenic ion beam mixing and rapid thermal annealing. Three different arsenic-ion mixing conditions were examined in this work. The sheet resistance, residue As concentration post annealing and TiSi2 phase were characterized by using the* four-point probe, RBS and electron diffraction, respectively. TiSi2 of C54 phase was identified in the doubly implanted samples. The thickness of the Ti silicide and the TiSi2/Si interface were observed by the cross-sectional TEM.


1991 ◽  
Vol 230 ◽  
Author(s):  
S. Batra ◽  
K. Park ◽  
M. Lobo ◽  
S. Banerjee

AbstractTo successfully implement Silicon-on-Insulator (SOI) technology using polysilicon-on-oxide, it is necessary to maximize the grain size such that the active devices are entirely within very large single crystal grains. A drastic increase in grain size in polysilicon has been reported due to secondary grain growth in ultra-thin, heavily n-type doped films upon regular furnace annealing. Very little work has been undertaken, however, to study secondary grain growth during Rapid Thermal Annealing (RTA).This paper is a study of the grain growth mechanism in heavily P-doped, amorphous silicon films during RTA. Secondary grains as large as 16 μm have been obtained in 160 nm thick films after a 180 s RTA at 1200 °C, representing a grainsize- to-film-thickness-ratio of 100:1. This is the largest secondary grain size and grain-size-to-film-thickness reported in the literature. A detailed analysis of negatively charged silicon vacancies has also been employed to explain the lower activation energy (1.55 eV) of secondary grain growth compared to that of normal grain growth (2.4 eV).


1987 ◽  
Vol 92 ◽  
Author(s):  
Brian M. Ditchek ◽  
Marvin Tabasky Marvin Tabasky ◽  
Emel S. Bulat

Interest in CoSi2 as a metallization for very large scale integrated circuits (VLSI) has grown rapidly since the recent demonstration of a simple self-aligned process performed by rapid thermal annealing.1-4 Using a rapid thermal anneal (RTA) to directly silicide Co on Si yields smooth low-sheet-resistance films with little or no lateral diffusion and low contact resistance. In addition, it has been shown that rapid thermal annealing can result in reasonable quality epitaxial CoSi2 on (111) Si wafers.5 An important advantage of CoSi2 over the more commonly used TiSi2 metallization is the relative simplicity of its self-aligned silicidation process. Due to the low reactivity of Co with SiO2, a simple two-step self-alignment process is possible instead of the three-step process necessary with TiSi2.6 The primary disadvantage of CoSi2 is the amount of Si consumed for equal silicide sheet resistance. For example, to yield a silicide sheet resistance of 1.5 1/LD, Van den Hove 4 finds that compared to the TiSi, process, the CoSi, process would consume an additional 24 nm of Si. (This disadvantage can be minimized if very shallow junctions can be formed under the CoSi2.)


1985 ◽  
Vol 52 ◽  
Author(s):  
M. Tabasky ◽  
E. S. Bulat ◽  
B. M. Ditchek ◽  
M. A. Sullivan ◽  
S. Shatas

ABSTRACTRapid thermal annealing is used to form cobalt silicide directly on unimplanted as well as B, As, and P implanted wafers. The films are characterized by sheet resistance, X-ray diffraction, SEM, SIMS, and contact resistance measurements. The direct silicidation of cobalt on Si by rapid thermal annealing yields smooth, low resistivity films with minimal dopant redistribution.


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