Experimental Study of Etched Back Thermal Oxide for Optimization of the Si/High-k Interface

ABSTRACTWe have demonstrated a uniform, robust interface for high-k deposition with significant improvements in device electrical performance compared to conventional surface preparation techniques. The interface was a thin thermal oxide that was grown and then etched back in a controlled manner to the desired thickness. Utilizing this approach, an equivalent oxide thickness (EOT) as low as 0.87 nm has been demonstrated on high-k gate stacks having improved electrical characteristics as compared to more conventionally prepared starting surfaces.

Download Full-text

Equivalent Oxide Thickness Reduction for High-k Gate Stacks by Optimized Rare-Earth Silicate Reactions

Electrochemical and Solid-State Letters ◽

10.1149/1.3086266 ◽

2009 ◽

Vol 12 (5) ◽

pp. G17 ◽

Cited By ~ 9

Author(s):

S. Van Elshocht ◽

C. Adelmann ◽

P. Lehnen ◽

S. De Gendt

Keyword(s):

Rare Earth ◽

Oxide Thickness ◽

Thickness Reduction ◽

Equivalent Oxide Thickness ◽

Gate Stacks ◽

High K

Download Full-text

Highly Scalable ALD-deposited Hafnium Silicate Gate Stacks for Low Standby Power Applications

MRS Proceedings ◽

10.1557/proc-0917-e11-04 ◽

2006 ◽

Vol 917 ◽

Cited By ~ 3

Author(s):

Johan Swerts ◽

Wim Deweerd ◽

Chang-gong Wang ◽

Yanina Fedorenko ◽

Annelies Delabie ◽

...

Keyword(s):

Thermal Stability ◽

Layer Thickness ◽

Atomic Layer ◽

Oxide Thickness ◽

Electrical Performance ◽

Equivalent Oxide Thickness ◽

Gate Leakage ◽

Gate Stacks ◽

Hafnium Silicate ◽

Scaling Potential

AbstractThe electrical performance of hafnium silicate (HfSiOx) gate stacks grown by atomic layer deposition (ALD) has been evaluated in capacitors and transistors. First, scaling potential of HfSiOx layers was studied as function of composition and thickness. It is shown that the equivalent oxide thickness scales down with decreasing layer thickness and increasing Hf-content. The gate leakage (at Vfb-1V), however, is mainly determined by the physical layer thickness. For the same equivalent oxide thickness (EOT) target, the lowest leakage is observed for the layers with the highest Hf-content. Leakage values as low as 1x10-3 A/cm2 for an equivalent oxide thickness of 1.3 nm have been obtained. Second, the thermal stability against crystallization of the ALD HfSiOx has been studied and related to their electrical properties. The thermal stability of HfSiOx decreases with increasing Hf-content that necessitates the use of nitridation. The influence of various annealing conditions on the nitrogen incorporation is also studied. Finally, the effect of HfSiOx composition and postdeposition nitridation is discussed on transistor level. TaN metal gate transistor data indicate that nitridation reduces the gate leakage and that Hf-rich HfSiOx layers show the best scaling potential, i.e., highest performance for the lowest gate leakage.

Download Full-text

Electrical Characteristics of Crystalline Gd2O3 Film on Si (111): Impacts of Growth Temperature and Post Deposition Annealing

MRS Proceedings ◽

10.1557/proc-1252-i05-09 ◽

2010 ◽

Vol 1252 ◽

Author(s):

Gang Niu ◽

Bertrand Vilquin ◽

Nicolas Baboux ◽

Guillaume Saint-Girons ◽

Carole Plossu ◽

...

Keyword(s):

Molecular Beam ◽

Defect Density ◽

Oxide Thickness ◽

Electrical Characteristics ◽

Equivalent Oxide Thickness ◽

Optimal Temperature ◽

Post Deposition Annealing ◽

High K ◽

Electrical Characterizations ◽

Post Deposition

AbstractThis work reports on the epitaxial growth of crystalline high-k Gd2O3 on Si (111) by Molecular Beam Epitaxy (MBE) for CMOS gate application. Epitaxial Gd2O3 films of different thicknesses have been deposited on Si (111) between 650°C~750°C. Electrical characterizations reveal that the sample grown at the optimal temperature (700°C) presents an equivalent oxide thickness (EOT) of 0.73nm with a leakage current density of 3.6×10-2 A/cm2 at |Vg-VFB|=1V. Different Post deposition Annealing (PDA) treatments have been performed for the samples grown under optimal condition. The Gd2O3 films exhibit good stability and the PDA process can effectively reduce the defect density in the oxide layer, which results in higher performances of the Gd2O3/Si (111) capacitor.

Download Full-text

Electrical Characteristics of TaOxNy for High-k MOS Gate Dielectric Applications

MRS Proceedings ◽

10.1557/proc-611-c1.8.1 ◽

2000 ◽

Vol 611 ◽

Author(s):

Kiju Im ◽

Hyungsuk Jung ◽

Sanghun Jeon ◽

Dooyoung Yang ◽

Hyunsang Hwang

Keyword(s):

Electron Spectroscopy ◽

Gate Dielectric ◽

Tantalum Oxide ◽

Charge Trapping ◽

Oxide Thickness ◽

Electrical Characteristics ◽

Equivalent Oxide Thickness ◽

Ammonia Treatment ◽

High K ◽

Mos Gate

ABSTRACTIn this paper, we report a process for the preparation of high quality amorphous tantalum oxynitride (TaOxNy) via ammonia annealing of Ta2O5 followed by wet reoxidation for use in gate dielectric applications. Compared with tantalum oxide(Ta2O5), a significant improvement in the dielectric constant was obtained by the ammonia treatment followed by light reoxidation in a wet ambient. We confirmed nitrogen incorporation in the tantalum oxynitride (TaOxNy) by Auger Electron Spectroscopy. By optimizing the nitridation and reoxidation process, we obtained an equivalent oxide thickness of less than 1.6nm and a leakage current of less than 10mA/cm2 at -1.5V. Compared with NH3 nitridation, nitridation of Ta2O5 in ND3 improve charge trapping and charge-to-breakdown characteristics of tantalum oxynitride.

Download Full-text