Electrical Characteristics of Crystalline Gd2O3 Film on Si (111): Impacts of Growth Temperature and Post Deposition Annealing

2010 ◽  
Vol 1252 ◽  
Author(s):  
Gang Niu ◽  
Bertrand Vilquin ◽  
Nicolas Baboux ◽  
Guillaume Saint-Girons ◽  
Carole Plossu ◽  
...  
Keyword(s):  
Molecular Beam ◽  
Defect Density ◽  
Oxide Thickness ◽  
Electrical Characteristics ◽  
Equivalent Oxide Thickness ◽  
Optimal Temperature ◽  
Post Deposition Annealing ◽  
High K ◽  
Electrical Characterizations ◽  
Post Deposition

AbstractThis work reports on the epitaxial growth of crystalline high-k Gd2O3 on Si (111) by Molecular Beam Epitaxy (MBE) for CMOS gate application. Epitaxial Gd2O3 films of different thicknesses have been deposited on Si (111) between 650°C~750°C. Electrical characterizations reveal that the sample grown at the optimal temperature (700°C) presents an equivalent oxide thickness (EOT) of 0.73nm with a leakage current density of 3.6×10-2 A/cm2 at |Vg-VFB|=1V. Different Post deposition Annealing (PDA) treatments have been performed for the samples grown under optimal condition. The Gd2O3 films exhibit good stability and the PDA process can effectively reduce the defect density in the oxide layer, which results in higher performances of the Gd2O3/Si (111) capacitor.

Strategies for CMOS Low Equivalent Oxide Thickness Achievement with High-κ Oxides Grown on Si(001) by MBE

2008 ◽  
Vol 1073 ◽  
Author(s):  
Loic Becerra ◽  
Clément Merckling ◽  
Nicolas Baboux ◽  
Mario El-Kazzi ◽  
Guillaume Saint-Girons ◽  
...  
Keyword(s):  
Photoelectron Spectroscopy ◽  
Molecular Beam ◽  
Oxide Thickness ◽  
Flat Band ◽  
Equivalent Oxide Thickness ◽  
Electrical Measurements ◽  
X Ray ◽  
High K ◽  
Density Of Interface States ◽  
Post Deposition

ABSTRACTAmorphous LaAlO3 high-k oxide was grown in a molecular beam epitaxy reactor on p-Si(001) using a thin γ-Al2O3 epitaxied buffer layer. Interfaces were free of SiO2 or silicates and remained abrupt despite the high temperature used for annealing, as X-ray photoelectron spectroscopy showed. Electrical measurements performed on as-deposited samples revealed a dielectric constant value close to that of the bulk, small equivalent oxide thickness and low density of interface states. But some negative charges were present, leading to a flat band voltage shift. Post deposition annealing with forming gas can correct this effect.

Interface Engineering During Epitaxial Growth of High-K Lanthanide Oxides on Silicon

2006 ◽  
Vol 917 ◽  
Author(s):  
H. Joerg Osten ◽  
Malte Czernohorsky ◽  
Eberhard Bugiel ◽  
Dirk Kuehne ◽  
Andreas Fissel
Keyword(s):  
Molecular Beam ◽  
Oxygen Supply ◽  
Oxide Thickness ◽  
Interface Structure ◽  
Equivalent Oxide Thickness ◽  
Lanthanide Oxides ◽  
Partial Pressures ◽  
High K ◽  
Current Densities ◽  
Optimized Conditions

AbstractWe investigated the influence of additional oxygen supply and temperature during the growth of thin Gd2O3 layers on Si(001) with molecular beam epitaxy. Additional oxygen supply during growth improves the dielectric properties significantly; however too high oxygen partial pressures lead to an increase in the lower permittivity interfacial layer thickness. The growth temperature mainly influences the dielectric gate stack properties due to changes of the Gd2O3/Si interface structure. Optimized conditions (600 °C, pO2 = 5·10-7 mbar) were found to achieve equivalent oxide thickness values below 1 nm accompanied by leakage current densities below 1 mA/cm2 at 1 V.

Electrical Characteristics of TaOxNy for High-k MOS Gate Dielectric Applications

2000 ◽  
Vol 611 ◽  
Author(s):  
Kiju Im ◽  
Hyungsuk Jung ◽  
Sanghun Jeon ◽  
Dooyoung Yang ◽  
Hyunsang Hwang
Keyword(s):  
Electron Spectroscopy ◽  
Gate Dielectric ◽  
Tantalum Oxide ◽  
Charge Trapping ◽  
Oxide Thickness ◽  
Electrical Characteristics ◽  
Equivalent Oxide Thickness ◽  
Ammonia Treatment ◽  
High K ◽  
Mos Gate

ABSTRACTIn this paper, we report a process for the preparation of high quality amorphous tantalum oxynitride (TaOxNy) via ammonia annealing of Ta2O5 followed by wet reoxidation for use in gate dielectric applications. Compared with tantalum oxide(Ta2O5), a significant improvement in the dielectric constant was obtained by the ammonia treatment followed by light reoxidation in a wet ambient. We confirmed nitrogen incorporation in the tantalum oxynitride (TaOxNy) by Auger Electron Spectroscopy. By optimizing the nitridation and reoxidation process, we obtained an equivalent oxide thickness of less than 1.6nm and a leakage current of less than 10mA/cm2 at -1.5V. Compared with NH3 nitridation, nitridation of Ta2O5 in ND3 improve charge trapping and charge-to-breakdown characteristics of tantalum oxynitride.

Impact of Post Deposition Annealing on Characteristics of HfxZr1-xO2

2009 ◽  
Vol 1155 ◽  
Author(s):  
Dina Triyoso ◽  
Rama H. Hegde ◽  
Rich Gregory ◽  
Greg S. Spencer ◽  
William Taylor
Keyword(s):  
Laser Annealing ◽  
Void Formation ◽  
High Mobility ◽  
Oxide Thickness ◽  
Post Deposition Annealing ◽  
Low Leakage ◽  
High K ◽  
A Minor ◽  
The Impact ◽  
Post Deposition

AbstractIn this paper the impact of post deposition annealing in various ambient on electrical properties of hafnium zirconate (HfxZr1-xO2) high-k dielectrics is reported. ALD HfxZr1-xO2 films are annealed in a nitrogen and/or oxygen ambient at 500°C to 1000°C. Devices annealed at 500°C in N2 has lower equivalent oxide thickness (EOT) of 10Å without significant increase in gate leakage (Jg), threshold voltage (Vt) and only a slight decrease in transconductance (Gm) values compared to 500°C O2 annealed devices. Furthermore, the impact of annealing HfxZr1-xO2 films in a reducing ambient (NH3) is studied. Optimized NH3 anneal on HfxZr1-xO2 results in lower CET, improved PBTI, low sub-threshold swing values, comparable high-field Gm with only a minor degradation in peak Gm compared to control HfxZr1-xO2. Finally, the impact of laser annealing vs. RTP annealed HfxZr1-xO2 films are reported. Laser annealing helped further stabilize tetragonal phase of HfxZr1-xO2 without inducing void formation. Good devices with low leakage, low EOT and high mobility are obtained for laser annealed HfxZr1-xO2.

Experimental Study of Etched Back Thermal Oxide for Optimization of the Si/High-k Interface

2004 ◽  
Vol 811 ◽  
Author(s):  
Joel Barnett ◽  
N. Moumen ◽  
J. Gutt ◽  
M. Gardner ◽  
C. Huffman ◽  
...  
Keyword(s):  
Experimental Study ◽  
Surface Preparation ◽  
Oxide Thickness ◽  
Electrical Performance ◽  
Electrical Characteristics ◽  
Equivalent Oxide Thickness ◽  
Gate Stacks ◽  
Thermal Oxide ◽  
High K ◽  
Preparation Techniques

ABSTRACTWe have demonstrated a uniform, robust interface for high-k deposition with significant improvements in device electrical performance compared to conventional surface preparation techniques. The interface was a thin thermal oxide that was grown and then etched back in a controlled manner to the desired thickness. Utilizing this approach, an equivalent oxide thickness (EOT) as low as 0.87 nm has been demonstrated on high-k gate stacks having improved electrical characteristics as compared to more conventionally prepared starting surfaces.

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