scholarly journals Fresnel calculations of double/multi-layer antireflection coatings on silicon substrates

Author(s):  
Al Montazer Mandong ◽  
◽  
Abdullah Uzum ◽  
2009 ◽  
Vol 76 (5) ◽  
pp. 302 ◽  
Author(s):  
I. S. Gaĭnutdinov ◽  
N. Yu. Shuvalov ◽  
R. S. Sabirov ◽  
V. A. Ivanov ◽  
R. R. Gareev ◽  
...  

Author(s):  
R. W. Ditchfield ◽  
A. G. Cullis

An energy analyzing transmission electron microscope of the Möllenstedt type was used to measure the electron energy loss spectra given by various layer structures to a spatial resolution of 100Å. The technique is an important, method of microanalysis and has been used to identify secondary phases in alloys and impurity particles incorporated into epitaxial Si films.Layers Formed by the Epitaxial Growth of Ge on Si Substrates Following studies of the epitaxial growth of Ge on (111) Si substrates by vacuum evaporation, it was important to investigate the possible mixing of these two elements in the grown layers. These layers consisted of separate growth centres which were often triangular and oriented in the same sense, as shown in Fig. 1.


Author(s):  
E. L. Hall ◽  
A. Mogro-Campero ◽  
L. G. Turner ◽  
N. Lewis

There is great interest in the growth of thin superconducting films of YBa2Cu3Ox on silicon, since this is a necessary first step in the use of this superconductor in a variety of possible electronic applications including interconnects and hybrid semiconductor/superconductor devices. However, initial experiments in this area showed that drastic interdiffusion of Si into the superconductor occurred during annealing if the Y-Ba-Cu-O was deposited direcdy on Si or SiO2, and this interdiffusion destroyed the superconducting properties. This paper describes the results of the use of a zirconia buffer layer as a diffusion barrier in the growth of thin YBa2Cu3Ox films on Si. A more complete description of the growth and characterization of these films will be published elsewhere.Thin film deposition was carried out by sequential electron beam evaporation in vacuum onto clean or oxidized single crystal Si wafers. The first layer evaporated was 0.4 μm of zirconia.


Author(s):  
Peter Pegler ◽  
N. David Theodore ◽  
Ming Pan

High-pressure oxidation of silicon (HIPOX) is one of various techniques used for electrical-isolation of semiconductor-devices on silicon substrates. Other techniques have included local-oxidation of silicon (LOCOS), poly-buffered LOCOS, deep-trench isolation and separation of silicon by implanted oxygen (SIMOX). Reliable use of HIPOX for device-isolation requires an understanding of the behavior of the materials and structures being used and their interactions under different processing conditions. The effect of HIPOX-related stresses in the structures is of interest because structuraldefects, if formed, could electrically degrade devices.This investigation was performed to study the origin and behavior of defects in recessed HIPOX (RHIPOX) structures. The structures were exposed to a boron implant. Samples consisted of (i) RHlPOX'ed strip exposed to a boron implant, (ii) recessed strip prior to HIPOX, but exposed to a boron implant, (iii) test-pad prior to HIPOX, (iv) HIPOX'ed region away from R-HIPOX edge. Cross-section TEM specimens were prepared in the <110> substrate-geometry.


Author(s):  
H. L. Tsai ◽  
J. W. Lee

Growth of GaAs on Si using epitaxial techniques has been receiving considerable attention for its potential application in device fabrication. However, because of the 4% lattice misfit between GaAs and Si, defect generation at the GaAs/Si interface and its propagation to the top portion of the GaAs film occur during the growth process. The performance of a device fabricated in the GaAs-on-Si film can be degraded because of the presence of these defects. This paper describes a HREM study of the effects of both the substrate surface quality and postannealing on the defect propagation and elimination.The silicon substrates used for this work were 3-4 degrees off [100] orientation. GaAs was grown on the silicon substrate by molecular beam epitaxy (MBE).


Author(s):  
I. H. Musselman ◽  
R.-T. Chen ◽  
P. E. Russell

Scanning tunneling microscopy (STM) has been used to characterize the surface roughness of nonlinear optical (NLO) polymers. A review of STM of polymer surfaces is included in this volume. The NLO polymers are instrumental in the development of electrooptical waveguide devices, the most fundamental of which is the modulator. The most common modulator design is the Mach Zehnder interferometer, in which the input light is split into two legs and then recombined into a common output within the two dimensional waveguide. A π phase retardation, resulting in total light extinction at the output of the interferometer, can be achieved by changing the refractive index of one leg with respect to the other using the electrooptic effect. For best device performance, it is essential that the NLO polymer exhibit minimal surface roughness in order to reduce light scattering. Scanning tunneling microscopy, with its high lateral and vertical resolution, is capable of quantifying the NLO polymer surface roughness induced by processing. Results are presented below in which STM was used to measure the surface roughness of films produced by spin-coating NLO-active polymers onto silicon substrates.


Author(s):  
N. David Theodore ◽  
Leslie H. Allen ◽  
C. Barry Carter ◽  
James W. Mayer

Metal/polysilicon investigations contribute to an understanding of issues relevant to the stability of electrical contacts in semiconductor devices. These investigations also contribute to an understanding of Si lateral solid-phase epitactic growth. Metals such as Au, Al and Ag form eutectics with Si. reactions in these metal/polysilicon systems lead to the formation of large-grain silicon. Of these systems, the Al/polysilicon system has been most extensively studied. In this study, the behavior upon thermal annealing of Au/polysilicon bilayers is investigated using cross-section transmission electron microscopy (XTEM). The unique feature of this system is that silicon grain-growth occurs at particularly low temperatures ∽300°C).Gold/polysilicon bilayers were fabricated on thermally oxidized single-crystal silicon substrates. Lowpressure chemical vapor deposition (LPCVD) at 620°C was used to obtain 100 to 400 nm polysilicon films. The surface of the polysilicon was cleaned with a buffered hydrofluoric acid solution. Gold was then thermally evaporated onto the samples.


1998 ◽  
Vol 08 (PR3) ◽  
pp. Pr3-297-Pr3-300 ◽  
Author(s):  
S. Linzen ◽  
Y. J. Tian ◽  
U. Hübner ◽  
F. Schmidl ◽  
J. Scherbel ◽  
...  

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